← Back to Patent Explorer
US5866950A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor package and fabrication method

Assignee: Toshiba Corp
•
Filing: 1996-11-14
•
Granted: 1999-02-02
•
Expires: 2016-11-14
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A semiconductor package comprises a circuit board having a wiring circuit including at least a connecting portion, the wiring circuit being formed on a first main surface of the circuit board, a semiconductor chip mounted on the first main surface of the circuit board on face-down basis, an insulation resin layer filled in a space between the semiconductor chip and the circuit board, and a flat-type external connecting terminal electrically connected to the semiconductor chip and formed and exposed to a second main surface of the circuit board.

Inventors

  • 👤 Hiroshi Iwasaki
  • 👤 Hideo Aoki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 11:28
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/30; H10W74/00; H10W74/01; H10W74/012; H10W74/10; H10W74/111; H10W74/15; H10W72/071; H10W72/072; H10W72/07231; H10W72/07232; H10W72/07233; H10W72/07236; H10W72/073; H10W72/07331; H10W72/07337; H10W72/351; H10W72/353; H10W72/354; H10W72/851; H10W72/853; H10W72/856; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/721; H10W90/724; H10W90/731; H10W90/734; H10W90/751; H10W90/754

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 183 words
A thin-type semiconductor package comprising: a circuit board having a wiring circuit on a first main surface of the circuit board and a connecting portion on and raised above the wiring circuit, and the connecting portion made of a first metal; an electronic device including a semiconductor chip mounted in face-down relation on the first main surface, the chip having an electrode terminal portion on and protruding below a face of the chip, wherein the connecting portion has a raised shape corresponding to the electrode terminal portion so that at least a portion of the electrode terminal portion is buried into the connecting portion, and the electrode terminal portion made of a second metal; a flat-type external connecting terminal electrically connected to said electronic device and disposed on and exposed at a second main surface of the circuit board; and an insulating resin layer sealing the first main surface of said circuit board including said electronic device, wherein the connecting portion and the electrode terminal portion of the electronic device have a solid-phase diffused zone of the first metal and the second metal.
Claim 2
Dependent Claim 183 words
A thin-type semiconductor package comprising: a circuit board having a wiring circuit on a first main surface of the circuit board and a connecting portion on and raised above the wiring circuit, and the connecting portion made of a first metal; an electronic device including a semiconductor chip mounted in face-down relation on the first main surface, the chip having an electrode terminal portion on and protruding below a face of the chip, wherein the connecting portion has a raised shape corresponding to the electrode terminal portion so that at least a portion of the electrode terminal portion is buried into the connecting portion, and the electrode terminal portion made of a second metal; a flat-type external connecting terminal electrically connected to said electronic device and disposed on and exposed at a second main surface of the circuit board; and an insulating resin layer sealing the first main surface of said circuit board including said electronic device, wherein the connecting portion and the electrode terminal portion of the electronic device have a solid-phase diffused zone of the first metal and the second metal.
Claim 3
Dependent Claim 20 words
The semiconductor package as set forth in claim 1, wherein the insulating resin layer is formed of an epoxy resin.
Claim 4
Dependent Claim 25 words
The semiconductor package as set forth in claim 1, wherein a thickness of the circuit board is in the range from 0.2 to 0.5 mm.
Claim 5
Dependent Claim 25 words
The semiconductor package as set forth in claim 1, wherein a thickness of the semiconductor chip is in the range from 0.2 to 0.5 mm.
Claim 6
Dependent Claim 25 words
The semiconductor package as set forth in claims 1, 2, 3, or 4, wherein a thickness of the semiconductor package is 1 mm or less.
Claim 7
Dependent Claim 21 words
The semiconductor package as set forth in claim 5, wherein the thickness of the semiconductor package is 0.6 mm or less.
Claim 8
Dependent Claim 22 words
The semiconductor package as set forth in claim 1, wherein the insulating resin layer is formed by a liquid transfer molding method.
Claim 9
Dependent Claim 31 words
A thin-type semiconductor package as set forth in claim 10, wherein the circuit board has a supporting cured resin layer so that the wiring circuit and the connecting portion are exposed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-02-01 2002-08-03 2003-02-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-02-01 2006-08-03 2007-02-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-02-01 2010-08-03 2011-02-02 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag