Patent US5841317A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5841317A Expired / Lapsed US ⏱️ 0.0 years remaining

Differential amplifier circuit with a high through put rate and reduced power consumption

Assignee: Panasonic Holdings Corp
•
Filing: 1996-02-26
•
Granted: 1998-11-24
•
Expires: 2016-02-26
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A differential amplifier achieving a high throughput rate with reduced power consumption includes a differential circuit, output circuit, a constant current source transistor, a drive transistor, and a switching circuit. A difference voltage relative to a difference between voltages applied to non-inverting and inverting inputs of the differential circuit is applied to the switching circuit. The switching circuit supplies a drive signal to the drive transistor to enable the drive transistor when the difference voltage is below a predetermined threshold voltage, and to disable the drive transistor when the difference voltage is above the predetermined threshold voltage.

Inventors

  • 👤 Tetsurou Ohmori
  • 👤 Yoshito Date
  • 👤 Takashi Koizumi
  • 👤 Yoshio Imamura
  • 👤 Osamu Sarai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 22:43
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F1/00; H03F1/02; H03F1/0205; H03F1/0277; H03F3/30; H03F3/3001; H03F2203/00; H03F2203/30; H03F2203/30057

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 140 words
A differential amplifier comprising: a differential circuit, comprising a non-inverting input and an inverting input, for outputting a difference voltage relative to a difference between a first voltage applied to the non-inverting input and a second voltage applied to the inverting input; an output circuit comprising a constant current supply transistor for supplying a constant current, and a control transistor controlled by said difference voltage, and a junction between said supply transistor and said control transistor; a drive transistor connected to said junction for supplying current in a same direction as said constant current supply transistor; and a switching circuit for supplying a drive signal to said drive transistor to enable said drive transistor when said difference voltage is below a predetermined threshold voltage, and to disable said drive transistor when said difference voltage is above said predetermined threshold voltage.
Claim 2
Dependent Claim 140 words
A differential amplifier comprising: a differential circuit, comprising a non-inverting input and an inverting input, for outputting a difference voltage relative to a difference between a first voltage applied to the non-inverting input and a second voltage applied to the inverting input; an output circuit comprising a constant current supply transistor for supplying a constant current, and a control transistor controlled by said difference voltage, and a junction between said supply transistor and said control transistor; a drive transistor connected to said junction for supplying current in a same direction as said constant current supply transistor; and a switching circuit for supplying a drive signal to said drive transistor to enable said drive transistor when said difference voltage is below a predetermined threshold voltage, and to disable said drive transistor when said difference voltage is above said predetermined threshold voltage.
Claim 3
Dependent Claim 42 words
A differential amplifier according to claim 1, wherein said predetermined threshold voltage is set to a value less than the difference voltage obtained when absolute values of the currents flowing through said constant current supply transistor and said control transistor are equal.
Claim 4
Dependent Claim 32 words
A differential amplifier according to claim 1, wherein said predetermined threshold voltage is set to a value less than the difference voltage obtained when current begins to flow through the control transistor.
Claim 5
Dependent Claim 165 words
A differential amplifier according to claim 1, wherein said differential circuit comprises: a first p-channel MOS transistor having a constant bias voltage applied to the gate thereof; second and third p-channel MOS transistors, the sources of said second and third p-channel MOS transistors being connected to the drain of said first p-channel MOS transistor, the gate of said second p-channel MOS transistor being connected to said non-inverting input and the gate of said third p-channel MOS transistor being connected to said inverting input, and first and second n-channel MOS transistors, the drain of said first n-channel MOS transistor being connected to the drain of said second p-channel MOS transistor and the drain of said second n-channel MOS transistor being connected to the drain of said third p-channel MOS transistor the gates of said first and second n-channel MOS transistors being connected in common and to one of the drains thereof, and the sources of said first and second n-channel MOS transistors being connected in common.
Claim 6
Dependent Claim 70 words
A differential amplifier according to claim 4, wherein said constant current supply transistor is a fourth p-channel MOS transistor having said constant bias voltage applied to the gate thereof; the control transistor is a third n-channel MOS transistor, having said difference voltage applied to the gate thereof; and the drive transistor is a fifth p-channel MOS transistor, having said drive signal from said switching circuit applied to the gate thereof.
Claim 7
Dependent Claim 24 words
A differential amplifier according to claim 5, wherein said switching circuit comprises a first inverter circuit and a second inverter circuit connected in series.
Claim 8
Dependent Claim 93 words
A differential amplifier according to claim 6, wherein said first inverter circuit comprises a sixth p-channel MOS transistor, to the gate of which is applied said difference voltage, and a fourth n-channel MOS transistor, to the gate of which is also applied said difference voltage, and wherein said second inverter circuit comprises a seventh p-channel MOS transistor, to the gate of which is applied an output voltage of the first inverter circuit, and a fifth n-channel MOS transistor, to the gate of which is applied the output voltage of the first inverter circuit.
Claim 9
Dependent Claim 89 words
A differential amplifier according to claim 6, wherein said first inverter circuit comprises a sixth p-channel MOS transistor, the gate of which is grounded, and a fourth n-channel MOS transistor, to the gate of which is applied said difference voltage, and wherein said second inverter circuit comprises a seventh p-channel MOS transistor, to the gate of which is applied an output voltage of the first inverter circuit, and a fifth n-channel MOS transistor, to the gate of which is also applied the output voltage of the first inverter circuit.
Claim 10
Dependent Claim 47 words
A differential amplifier according to claim 7, wherein said switching circuit further comprises: an eighth p-channel MOS transistor connected to a current path for supplying current to said sixth p-channel MOS transistor; and a sixth n-channel MOS transistor connected in parallel to said fourth n-channel MOS transistor.
Claim 11
Dependent Claim 47 words
A differential amplifier according to claim 8, wherein said switching circuit further comprises: an eighth p-channel MOS transistor connected to a current path for supplying current to said sixth p-channel MOS transistor; and a sixth n-channel MOS transistor connected in parallel to said fourth n-channel MOS transistor.
Claim 12
Dependent Claim 140 words
A differential amplifier comprising: a differential circuit, comprising a non-inverting input and an inverting input, for outputting a difference voltage relative to a difference between a first voltage applied to the non-inverting input and a second voltage applied to the inverting input; an output circuit comprising a constant current supply transistor for supplying a constant current, and a control transistor controlled by said difference voltage, and a junction between said supply transistor and said control transistor; a drive transistor connected to said junction for supplying current in a same direction as said constant current supply transistor; and a switching circuit for supplying a drive signal to said drive transistor to enable said drive transistor when said difference voltage is above a predetermined threshold voltage, and to disable said drive transistor when said difference voltage is below said predetermined threshold voltage.
Claim 13
Dependent Claim 140 words
A differential amplifier comprising: a differential circuit, comprising a non-inverting input and an inverting input, for outputting a difference voltage relative to a difference between a first voltage applied to the non-inverting input and a second voltage applied to the inverting input; an output circuit comprising a constant current supply transistor for supplying a constant current, and a control transistor controlled by said difference voltage, and a junction between said supply transistor and said control transistor; a drive transistor connected to said junction for supplying current in a same direction as said constant current supply transistor; and a switching circuit for supplying a drive signal to said drive transistor to enable said drive transistor when said difference voltage is above a predetermined threshold voltage, and to disable said drive transistor when said difference voltage is below said predetermined threshold voltage.
Claim 14
Dependent Claim 42 words
A differential amplifier according to claim 11, wherein said predetermined threshold voltage is set to a value greater than the difference voltage obtained when absolute values of the currents flowing through said constant current supply transistor and said control transistor are equal.
Claim 15
Dependent Claim 32 words
A differential amplifier according to claim 11, wherein said predetermined threshold voltage is set to a value greater than the difference voltage obtained when current begins to flow through the control transistor.
Claim 16
Dependent Claim 165 words
A differential amplifier according to claim 11, wherein said differential circuit comprises: a first n-channel MOS transistor having a constant bias voltage applied to the gate thereof; second and third n-channel MOS transistors, the sources of said second and third n-channel MOS transistors being connected to the drain of said first n-channel MOS transistor, the gate of said second n-channel MOS transistor being connected to said non-inverting input and the gate of said third n-channel MOS transistor being connected to said inverting input, and first and second p-channel MOS transistors, the drain of said first p-channel MOS transistor being connected to the drain of said second n-channel MOS transistor and the drain of said second p-channel MOS transistor being connected to the drain of said third n-channel MOS transistor, the gates of said first and second p-channel MOS transistors being connected in common and to one of the drains thereof, and the sources of said first and second p-channel MOS transistors being connected in common.
Claim 17
Dependent Claim 70 words
A differential amplifier according to claim 14, wherein said constant current supply transistor is a fourth n-channel MOS transistor, having said constant bias voltage applied to the gate thereof; the control transistor is a third p-channel MOS transistor, having said difference voltage applied to the gate thereof; and the drive transistor is a fifth n-channel MOS transistor, having said drive signal from said switching circuit applied to the gate thereof.
Claim 18
Dependent Claim 24 words
A differential amplifier according to claim 15, wherein said switching circuit comprises a first inverter circuit and a second inverter circuit connected in series.
Claim 19
Dependent Claim 93 words
A differential amplifier according to claim 16, wherein said first inverter circuit comprises a sixth n-channel MOS transistor, to the gate of which is applied said difference voltage, and a fourth p-channel MOS transistor, to the gate of which is also applied said difference voltage, and wherein said second inverter circuit comprises a seventh n-channel MOS transistor, to the gate of which is applied an output voltage of the first inverter circuit, and a fifth p-channel MOS transistor, to the gate of which is applied the output voltage of the first inverter circuit.
Claim 20
Dependent Claim 93 words
A differential amplifier according to claim 16, wherein said first inverter circuit comprises a sixth n-channel MOS transistor, the gate of which is provided with a constant voltage, and a fourth p-channel MOS transistor, to the gate of which is applied said difference voltage, and wherein said second inverter circuit comprises a seventh n-channel MOS transistor, to the gate of which is applied an output voltage of the first inverter circuit, and a fifth p-channel MOS transistor, to the gate of which is also applied the output voltage of the first inverter circuit.
Claim 21
Dependent Claim 47 words
A differential amplifier according to claim 17, wherein said switching circuit further comprises: an eighth n-channel MOS transistor connected to a current path for supplying current to said sixth n-channel MOS transistor; and a sixth p-channel MOS transistor connected in parallel to said fourth p-channel MOS transistor.
Claim 22
Dependent Claim 47 words
A differential amplifier according to claim 18, wherein said switching circuit further comprises: an eighth n-channel MOS transistor connected to a current path for supplying current to said sixth n-channel MOS transistor; and a sixth p-channel MOS transistor connected to parallel to said fourth p-channel MOS transistor.

References Cited (Backward Citations)

US4462002A Cited
US5027013A Cited
US5338980A Cited
US5144259A Cited
US5220288A Cited
US5457433A Cited
US5606287A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-11-23 2002-05-25 2002-11-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-11-23 2006-05-25 2006-11-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-11-23 2010-05-25 2010-11-24 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag