US5027013A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for coupling an ECL output signal using a clamped capacitive bootstrap circuit
Assignee: MACOM Connectivity Solutions LLC
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Filing: 1990-05-09
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Granted: 1991-06-25
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Expires: 2010-05-09
Abstract
Abstract A method and apparatus for providing ECL output signals to a capacitative load includes differential amplification of input signals with a first output of a differential amplifier connected for establishing a voltage level between voltage limits V cc and V ee at the output of an output driver in response to variations in the first amplifier output. A pull-down transistor has a collector connected to the output driver output, an emitter connected to the V ee voltage source, and a base coupled through a boost capacitor to the second amplifier output. A voltage clamp embracing a clamp transistor with a base connected to receive a predetermined control voltage has an emitter connected to the boost capacitor and the pull-down transistor base and a collector connected to the V cc voltage source. The clamp transistor is operated in Darlington configuration to provide a minimum discharge impedence to the base of the pull-down transistor. A recovery capacitor is connected between the clamp transistor base and the first duplifier output to speed up the clamp transistor's operation.
Inventors
- 👤 Bruce H. Coy
- 👤 David S. Rosky
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 10:53
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/01; H03K19/013; H03K19/0136; H03K19/0175; H03K19/018; H03K19/01806; H03K19/01812
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
278 words
An apparatus for converting an input signal at a first logic level to an output signal at a second logic level and for providing the output signal to a capacitative load, the apparatus comprising: differential amplifier means with a first output and a second output for amplifying the input signal and providing, at the first output, a first signal representing amplification of the input signal and, at a second output, a second signal which is the complement of the first signal; an output driver with a connection for driving a capacitative load, the output driver connected to the first output for producing the output signal at the connection by level-shifting the first signal; a bootstrap transistor with a base, a collector connected to the connection, and an emitter for connection to a transistor voltage source; boost capacitor means connected to the first output and to the base of the bootstrap transistor for causing the bootstrap transistor to conduct output capacitance discharge current in response to the second signal; a clamp transistor means for clamping the base of the bootstrap transistor to a predetermined voltage level, the clamp transistor means including a clamp transistor with a collector for connection to the transistor voltage source, a base, and an emitter connected to the base of the bootstrap transistor for providing a voltage level which biases the bootstrap transistor at a predetermined low level of forward conduction and connected to the boost capacitor means for discharging the boost capacitor means; and acceleration means connected to the first output and to the base of the clamp transistor for accelerating the discharging of the boost capacitor means in response to the first signal.
Claim 2
Independent Claim
278 words
An apparatus for converting an input signal at a first logic level to an output signal at a second logic level and for providing the output signal to a capacitative load, the apparatus comprising: differential amplifier means with a first output and a second output for amplifying the input signal and providing, at the first output, a first signal representing amplification of the input signal and, at a second output, a second signal which is the complement of the first signal; an output driver with a connection for driving a capacitative load, the output driver connected to the first output for producing the output signal at the connection by level-shifting the first signal; a bootstrap transistor with a base, a collector connected to the connection, and an emitter for connection to a transistor voltage source; boost capacitor means connected to the first output and to the base of the bootstrap transistor for causing the bootstrap transistor to conduct output capacitance discharge current in response to the second signal; a clamp transistor means for clamping the base of the bootstrap transistor to a predetermined voltage level, the clamp transistor means including a clamp transistor with a collector for connection to the transistor voltage source, a base, and an emitter connected to the base of the bootstrap transistor for providing a voltage level which biases the bootstrap transistor at a predetermined low level of forward conduction and connected to the boost capacitor means for discharging the boost capacitor means; and acceleration means connected to the first output and to the base of the clamp transistor for accelerating the discharging of the boost capacitor means in response to the first signal.
Claim 3
Dependent Claim
26 words
The apparatus of claim 1 wherein the acceleration means includes a recovery capacitor connected to the first output and to the base of the clamp transistor.
Claim 4
Dependent Claim
42 words
The apparatus of claim 1 wherein the acceleration means includes a transistor with a base for connection to a clamp voltage source, a collector for connection to a transistor voltage source, and an emitter connected to the base of the clamp transistor.
Claim 5
Dependent Claim
18 words
The apparatus of claim 3 wherein the emitter of the transistor is further connected to the recovery capacitor.
Claim 6
Dependent Claim
14 words
The apparatus of claim 3 wherein the transistor and the clamp transistor are Darlington-connected.
Claim 7
Dependent Claim
162 words
In a apparatus which produces a pair of complementary signals representative of a first logic family signal and which includes an output driver for driving an output load including a second logic family in response to a first signal of the complementary pair of signals, a bootstrap transistor with a collector connected to the output driver, an emitter for connection to a transistor voltage source, and a base, and a clamp transistor with an emitter connected to the base of the bootstrap transistor, a base, and a collector, a method for speeding up the operation of the output driver, the method including the steps of: capacitatively conducting a second signal of the complementary pair of signals to the base of the bootstrap transistor; clamping the base of the clamp transistor to a predetermined low level of forward conduction through a transistor base-emitter junction; and capacitatively conducting the first signal of the complementary pair of signals to the base of the clamp transistor.
Claim 8
Dependent Claim
162 words
In a apparatus which produces a pair of complementary signals representative of a first logic family signal and which includes an output driver for driving an output load including a second logic family in response to a first signal of the complementary pair of signals, a bootstrap transistor with a collector connected to the output driver, an emitter for connection to a transistor voltage source, and a base, and a clamp transistor with an emitter connected to the base of the bootstrap transistor, a base, and a collector, a method for speeding up the operation of the output driver, the method including the steps of: capacitatively conducting a second signal of the complementary pair of signals to the base of the bootstrap transistor; clamping the base of the clamp transistor to a predetermined low level of forward conduction through a transistor base-emitter junction; and capacitatively conducting the first signal of the complementary pair of signals to the base of the clamp transistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-06-24 | 1994-12-24 | 1995-06-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-06-24 | 1998-12-24 | 1999-06-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-06-24 | 2002-12-24 | 2003-06-25 | $7700.00 | Window Closed / Lapsed |