US5840619A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making a semiconductor device having a planarized surface
Assignee: Mitsubishi Electric Corp
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Filing: 1996-01-16
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Granted: 1998-11-24
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Expires: 2016-01-16
Abstract
Abstract An object of the present invention is to completely reduce a difference in level in a short time at a convex pattern spreading horizontally on a large scale and obtain a semiconductor device having a planarized surface. An insulating film is formed on a semiconductor substrate to cover a horizontally spreading convex pattern and to fill in a concave portion. A portion of insulating film located on a planarized portion of convex pattern is selectively etched away so as to leave a frame-shaped insulating film having a width of 1-500 μm at least on the outer periphery portion of convex pattern. Insulating film left on semiconductor substrate is etched by chemical/mechanical polishing method, thereby planarizing a surface of the semiconductor substrate.
Inventors
- 👤 Yoshio Hayashide
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 16:33
CPC Classifications
H; H10; H10P; H10P50/00; H10P95/00; H10P95/06; H10P95/062; H10P95/064; H10P95/066; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/092
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
145 words
A method for manufacturing a semiconductor device having a planarized surface, comprising: a first step of preparing a semiconductor substrate having a high density interconnection region including a convex pattern having a planarized portion and a low density interconnection region, at the periphery of the high density region, comprising a concave portion; a second step of forming an insulating film on said semiconductor substrate to cover said convex pattern and to fill in said concave portion; a third step of selectively etching away a portion of said insulating film located on said planarized portion of said convex pattern so as to leave a remaining frame-shaped insulating film, having a width of 1-500 μm, at least on said outer periphery of said convex pattern; and a fourth step of polishing said remaining insulating film by chemical/mechanical polishing method, thereby planarizing the surface of the semiconductor device.
Claim 2
Independent Claim
145 words
A method for manufacturing a semiconductor device having a planarized surface, comprising: a first step of preparing a semiconductor substrate having a high density interconnection region including a convex pattern having a planarized portion and a low density interconnection region, at the periphery of the high density region, comprising a concave portion; a second step of forming an insulating film on said semiconductor substrate to cover said convex pattern and to fill in said concave portion; a third step of selectively etching away a portion of said insulating film located on said planarized portion of said convex pattern so as to leave a remaining frame-shaped insulating film, having a width of 1-500 μm, at least on said outer periphery of said convex pattern; and a fourth step of polishing said remaining insulating film by chemical/mechanical polishing method, thereby planarizing the surface of the semiconductor device.
Claim 3
Dependent Claim
31 words
The method according to claim 1, wherein said etching in said third step is performed so that the width of said frame-shaped insulating film is in a range of 1-100 μm.
Claim 4
Dependent Claim
32 words
The method according to claim 1, wherein a two-dimensional shape of said convex pattern is substantially a quadrangle, and length of a shortest side of said quadrangle is at least 100 μm.
Claim 5
Dependent Claim
31 words
The method according to claim 1, wherein a surface of said convex pattern is covered with a silicon oxide film prior to formation of the insulating film in said second step.
Claim 6
Dependent Claim
15 words
The method according to claim 1, wherein said insulating film includes a silicon oxide film.
Claim 7
Dependent Claim
17 words
The method according to claim 1, wherein said insulating film includes a phosphorus doped silicon oxide film.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-11-23 | 2002-05-25 | 2002-11-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-11-23 | 2006-05-25 | 2006-11-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-11-23 | 2010-05-25 | 2010-11-24 | $7700.00 | Window Closed / Lapsed |