Arrangement for determining the configuration of a memory utilizing dedicated control devices and dedicated control lines

Claim 2

An arrangement for determining a configuration of a memory that is formed by mounting regions accepting memory modules to which address lines proceeding from a memory controller are connected in parallel and having at least respectively one control line individually associated to mounting region from the memory controller to each mounting region comprising:, at least one of the address or control lines being defined as an information line for each mounting region; coding device for forming and communicating configuration information individually associated to mounting region from the memory to the memory controller via the at least one information line; and evaluation device in the memory controller for evaluation and storing of configuration information communicated via the information line individually associated to mounting region.

Claim 3

The arrangement according to claim 1, wherein at least respectively one of the address lines and control lines connected between the memory controller and a mounting region is defined as a capacity line for each mounting region; and wherein coding devices individually associated to mounting region are provided for forming and communicating capacity information via a respective capacity line, the capacity information respectively indicating memory capacity of inserted memory modules.

Claim 4

The arrangement according to claim 1, wherein at least respectively one line of further address line and control lines connected between the memory controller and a mounting region is defined as a presence line for each mounting region; and wherein devices individually associated to mounting region are provided for forming and communicating presence information via a respective presence line, the presence information respectively indicating presence of a memory module inserted into a respective mounting region.

Claim 5

The arrangement according to claim 1, wherein at least one line of further address lines and control lines is defined as a type line for each of the mounting regions; wherein additional coding devices individually associated to mounting region are provided for forming and communicating type information individually associated to memory module, the type information respectively indicating the type of inserted memory module; and wherein additional evaluation devices are provided in the memory controller for evaluation and storing of the type information communicated via a type line individually associated to mounting region.

Claim 6

The arrangement according to claim 1, wherein the coding device comprises: a predetermined first resistor, connected to a predetermined first voltage potential, connected to each capacity, presence or, respectively, type line in the memory controller; and a second resistor, indicating the presence or, respectively, the memory capacity or, respectively, the type of memory module inserted in a mounting region, connected to the respective capacity or, respectively, presence or, respectively, type line and to a predetermined second voltage potential for each memory module inserted in a mounting region.

Claim 7

The arrangement according to claim 5, wherein the first resistors in the memory controller are connected to the voltage potential provided for the voltage supply and the second resistors in the mounting regions are connected to a grounded potential.

Claim 8

The arrangement according to claim 5, wherein the first and second resistors provided in the memory controller and the mounting regions per capacity, presence or, respectively, type line are dimensioned such that voltage potentials formed by the memory controller for formation of control or, respectively, address information are connectable to the control lines or, respectively, address lines, the formation of control or, respectively, address information being deactivated during transmission of the configuration information.

Claim 9

The arrangement according to claim 7, wherein voltage evaluation devices for the evaluation of the voltage potentials adjacent at the capacity, presence or, respectively, type line are provided in the memory controller and are structured such that, dependent on adjacent voltage potential, a capacity, presence or, respectively, type information indicating the memory capacity, the presence or, respectively, the type of the inserted memory module is formed and stored memory-conforming for each mounting region, apparatus for communicating the control and address information to the mounting region being switched high-impedance.

Claim 10

The arrangement according to claim 8, wherein the capacity, presence or, respectively, type information are represented and stored by binary information.

Claim 11

The arrangement according to claim 1, wherein, given a plurality of capacity, presence or, respectively, type lines, the capacity, presence or, respectively, type information are formed by binarily encoded capacity, presence or, respectively, type information.

Claim 12

The arrangement according to claim 10, wherein additional decoding devices for evaluation of the binarily encoded voltage potentials adjacent at the capacity or, respectively, presence or, respectively, type lines are provided in the memory controller and structured such that, dependent on the adjacent, binarily encoded voltage potentials, a capacity, presence or, respectively, type information indicating the memory capacity, the presence or, respectively, the type of inserted memory module is formed and stored.

Claim 13

An arrangement for determining a configuration of a memory that is formed by mounting regions accepting memory modules to which address lines proceeding from a memory controller are connected in parallel and having at least respectively one control line individually associated to mounting region from the memory controller to each mounting region comprising:, at least one of the address or control lines being defined as an information line for each mounting region; coding devices for forming and communicating configuration information individually associated to mounting region from the memory to the memory controller via the at least one information line, the coding devices individually associated to mounting region for forming and communicating capacity information via a respective capacity line, the capacity information respectively indicating memory capacity of inserted memory modules; evaluation device in the memory controller for evaluation and storing of configuration information communicated via the information line individually associated to mounting region, at least respectively one of the address lines and control lines connected between the memory controller and a mounting region is defined as a capacity line for each mounting region; at least respectively one line of further address line and control lines connected between the memory controller and a mounting region defined as a presence line for each mounting region; devices individually associated to mounting region are provided for forming and communicating presence information via a respective presence line, the presence information respectively indicating presence of a memory module inserted into a respective mounting region; and at least one further line of further address lines and control lines defined as a type line for each of the mounting regions; additional coding devices individually associated to mounting region for forming and communicating type information individually associated to memory module, the type information respectively indicating the type of inserted memory module; and additional evaluation devices in the memory controller for evaluation and storing of the type information communicated via a type line individually associated to mounting region.

Claim 14

An arrangement for determining a configuration of a memory that is formed by mounting regions accepting memory modules to which address lines proceeding from a memory controller are connected in parallel and having at least respectively one control line individually associated to mounting region from the memory controller to each mounting region comprising:, at least one of the address or control lines being defined as an information line for each mounting region; coding devices for forming and communicating configuration information individually associated to mounting region from the memory to the memory controller via the at least one information line, the coding devices individually associated to mounting region for forming and communicating capacity information via a respective capacity line, the capacity information respectively indicating memory capacity of inserted memory modules; evaluation device in the memory controller for evaluation and storing of configuration information communicated via the information line individually associated to mounting region, at least respectively one of the address lines and control lines connected between the memory controller and a mounting region is defined as a capacity line for each mounting region; at least respectively one line of further address line and control lines connected between the memory controller and a mounting region defined as a presence line for each mounting region; devices individually associated to mounting region are provided for forming and communicating presence information via a respective presence line, the presence information respectively indicating presence of a memory module inserted into a respective mounting region; and at least one further line of further address lines and control lines defined as a type line for each of the mounting regions; additional coding devices individually associated to mounting region for forming and communicating type information individually associated to memory module, the type information respectively indicating the type of inserted memory module; and additional evaluation devices in the memory controller for evaluation and storing of the type information communicated via a type line individually associated to mounting region.

Claim 15

The arrangement according to claim 12, wherein the coding device comprises: a predetermined first resistor, connected to a predetermined first voltage potential, connected to each capacity, presence or, respectively, type line in the memory controller; and a second resistor, indicating the presence or, respectively, the memory capacity or, respectively, the type of memory module inserted in a mounting region, connected to the respective capacity or, respectively, presence or, respectively, type line and to a predetermined second voltage potential for each memory module inserted in a mounting region.

Claim 16

The arrangement according to claim 13, wherein the first resistors in the memory controller are connected to the voltage potential provided for the voltage supply and the second resistors in the mounting regions are connected to a grounded potential.

Claim 17

The arrangement according to claim 13, wherein the first and second resistors provided in the memory controller and the mounting regions per capacity, presence or, respectively, type line are dimensioned such that voltage potentials formed by the memory controller for formation of control or, respectively, address information are connectable to the control lines or, respectively, address lines, the formation of control or, respectively, address information being deactivated during transmission of the configuration information.

Claim 18

The arrangement according to claim 15, wherein voltage evaluation devices for the evaluation of the voltage potentials adjacent at the capacity, presence or, respectively, type line are provided in the memory controller and are structured such that, dependent on adjacent voltage potential, a capacity, presence or, respectively, type information indicating the memory capacity, the presence or, respectively, the type of the inserted memory module is formed and stored memory-conforming for each mounting region, apparatus for communicating the control and address information to the mounting region being switched high-impedance.

Claim 19

The arrangement according to claim 16, wherein the capacity, presence or, respectively, type information are represented and stored by binary information.

Claim 20

An arrangement for determining a configuration of a memory that is formed by mounting regions accepting memory modules to which address lines proceeding from a memory controller are connected in parallel and having at least respectively one control line individually associated to mounting region from the memory controller to each mounting region comprising:, at least one of the address or control lines being defined as an information line for each mounting region; coding device for forming and communicating configuration information individually associated to mounting region from the memory to the memory controller via the at least one information line; evaluation device in the memory controller for evaluation and storing of configuration information communicated via the information line individually associated to mounting region; a predetermined first resistor, connected to a predetermined first voltage potential, connected to each capacity, presence or, respectively, type line in the memory controller; a second resistor, indicating the presence or, respectively, the memory capacity or, respectively, the type of memory module inserted in a mounting region, connected to the respective capacity or, respectively, presence or, respectively, type line and to a predetermined second voltage potential for each memory module inserted in a mounting region; and the first and second resistors provided in the memory controller and the mounting regions per capacity, presence or, respectively, type line are dimensioned such that voltage potentials formed by the memory controller for formation of control or, respectively, address information are connectable to the control lines or, respectively, address lines, the formation of control or, respectively, address information being deactivated during transmission of the configuration information.

Claim 21

An arrangement for determining a configuration of a memory that is formed by mounting regions accepting memory modules to which address lines proceeding from a memory controller are connected in parallel and having at least respectively one control line individually associated to mounting region from the memory controller to each mounting region comprising:, at least one of the address or control lines being defined as an information line for each mounting region; coding device for forming and communicating configuration information individually associated to mounting region from the memory to the memory controller via the at least one information line; evaluation device in the memory controller for evaluation and storing of configuration information communicated via the information line individually associated to mounting region; a predetermined first resistor, connected to a predetermined first voltage potential, connected to each capacity, presence or, respectively, type line in the memory controller; a second resistor, indicating the presence or, respectively, the memory capacity or, respectively, the type of memory module inserted in a mounting region, connected to the respective capacity or, respectively, presence or, respectively, type line and to a predetermined second voltage potential for each memory module inserted in a mounting region; and the first and second resistors provided in the memory controller and the mounting regions per capacity, presence or, respectively, type line are dimensioned such that voltage potentials formed by the memory controller for formation of control or, respectively, address information are connectable to the control lines or, respectively, address lines, the formation of control or, respectively, address information being deactivated during transmission of the configuration information.

Claim 22

The arrangement according to claim 18, wherein voltage evaluation devices for the evaluation of the voltage potentials adjacent at the capacity, presence or, respectively, type line are provided in the memory controller and are structured such that, dependent on adjacent voltage potential, a capacity, presence or, respectively, type information indicating the memory capacity, the presence or, respectively, the type of the inserted memory module is formed and stored memory-conforming for each mounting region, apparatus for communicating the control and address information to the mounting region being switched high-impedance.

Claim 23

The arrangement according to claim 19, wherein the capacity, presence or, respectively, type information are represented and stored by binary information.