EP0224877A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Universal module interface
Assignee: Tektronix Inc
•
Filing: 1986-11-27
•
Granted: —
•
Expires: 2006-11-27
Abstract
Abstract An interface circuit in a modular electronic system includes duplex control-signal transmission lines (16;20,22,24). Modules (14,18) connectable to a controller unit (12) of the system transmit configuration data items by way of the duplex lines to the controller during a first time period, and the controller during a second time period generates module control signals in accordance with the configuration of the modules (14,18). The module control signals are transmitted to the modules on the duplex transmission lines.
Inventors
- 👤 John G. Theus
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-03 13:52
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/06; G06F12/0646; G06F12/0684
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
177 words
l. A universal module interface in a modular electronic system, comprising: a control unit (12); and a modular unit (14,18) connectable to said control unit (12) and receiving control signals from said control unit when connected thereto, said connectable modular unit (14,18) being capable of more than one system configuration; characterized by , means (40',40")for transmitting a control signal between said control unit (12) and said modular unit (14,18); means (56) in said modular unit (14,18) for generating a configuration control signal (CS3) representing a system configuration of said modular unit; means (44) in said control unit (12) for receiving said configuration control signal (CS3) via said control signal transmitting means (40) during a first time period; means (46) in said control unit (12) having an output (47) coupled to said control signal transmitting means (40',40") and responsive to said configuration control signal for generating a module control signal (CS2); and means (50) in said modular unit (14,18) for receiving said module control signal (CS2) via said control signal transmitting means (40',40") during a second time period.
Claim 2
Dependent Claim
72 words
The interface of claim 1, characterized by means for generating a duplex control signal, said duplex control signal having a first state during said first time period and a second state during said second time period, said module control signal generating means including means responsive to said duplex control signal for decoupling the output of said module control signal generating means from said control signal transmitting means during said first time period.
Claim 3
Dependent Claim
27 words
The interface of claim 2, characterized by means (58) responsive to said duplex control signal for storing said configuration control signal (CS3) during said first time period.
Claim 4
Dependent Claim
259 words
An interface circuit in a modular electronic system having removable modules, characterized by: duplex means (40) for transmitting signals between a first module (12) and a second module (14,18) of the electronic system, said signal transmitting means having a first portion (40') in the first module and a second portion (40") in the second module, the first and second portions of said signal transmitting means being connectable at an interface (16;20) of the modules; means in the first module (12) for generating a first control signal (CSl), the first control signal being enabled during a first time period and disabled during a second time period; means in the first module (12) for generating a second control signal (CS2); logic means (46) in the first module (12) receiving the second control signal (CS2) and connected to the first portion (40') of said signal transmitting means for regenerating the second control signal on said signal transmitting means during the second time period, said logic means including means (48) responsive to the first control signal for disabling said regenerating means during the first time period; means coupled to the second portion (40") of said signal transmitting means (40) for receiving the second control signal regenerated; means for generating a third control signal (CSN1) on said signal transmitting means (66) during the first time period, the third control signal representing a physical configuration of said system, said logic means (44) including second means (64) for regenerating the third control signal; and means in said first module (12) for utilizing the third controls signal.
Claim 5
Dependent Claim
51 words
The interface circuit of claim 4, characterized in that the third control signal (CSN1) represents physical presence of the second module (14), the third control signal being an enabling signal when the second module (14) is connected at the interface (16) and a disabling signal when the second module is disconnected.
Claim 6
Dependent Claim
34 words
The interface circuit of claim 5, characterized in that said means for generating the third control signal comprises means for generating the disabling signal on the first portion (40') of said signal transmitting means.
Claim 7
Dependent Claim
59 words
The interface circuit of claim 6, characterized in that said means for regenerating the second control signal (CS2) and said disabling means comprise a tristate driver circuit (46) having an output terminal (47) connected to said signal transmitting means (40); and said means for generating the third control signal comprises a pull-down resistor (70) connected to the output terminal.
Claim 8
Dependent Claim
40 words
The interface circuit of claim 5, characterized in that said means for generating the third controls signal (CS3) comprises means in the second module (14) for generating the enabling signal on the second portion (40") of said signal transmitting means.
Claim 9
Dependent Claim
52 words
The interface circuit of claim 4, characterized in that the second module (14) comprises a data store and the third control signal represents a first size of the data store when the third control signal is enabled and a second size of the data store when the third control signal is disabled.
Claim 10
Dependent Claim
43 words
The interface circuit of claim .9, characterized in that said means for generating the third control signal comprises a logic means in the second module connected to the second portion of said signal transmitting means for enabling and disabling the third control signal.
Claim 11
Dependent Claim
40 words
ll. The interface circuit of claim 10, characterized in that said means for generating the third control signal (CSNl) comprises means in the second module for generating an enabling signal on the second portion of said signal transmitting means (40).
Claim 12
Dependent Claim
35 words
The interface circuit of claim 8 or 11, characterized in that said means for generating the enabling signal comprises a pull-up resistor (52) connected to the second portion (40") of said signal transmitting means (40).
Claim 13
Dependent Claim
24 words
l3.The interface circuit of claim 4, characterized by means (58) coupled to said second regenerating means (56) for storing the third control signal (CS3).
Claim 14
Dependent Claim
38 words
l4.The interface circuit of claim 13, characterized by: means (64) in said logic means (44) responsive to the third control signal for generating another control signal; and means in the second module for utilizing the other control signal.
Claim 15
Dependent Claim
49 words
The interface circuit of claim 13, characterized by: means in said logic means responsive to the third control signal for generating another control signal during the second time period; a third module connectable to the first module; and means in said third module for utilizing the other control signal.
Claim 16
Dependent Claim
38 words
l6.The interface circuit of claim 4, characterized in that said means for selectively enabling the third control signal comprises a resistor (52) connected between the second portion (40") of said signal transmitting means and a potential source (54).
Claim 17
Dependent Claim
32 words
The interface circuit of claim 16, characterized in that said means for generating the third control signal comprises means for disconnecting said resistor from the second portion of said signal transmitting means.
Claim 18
Dependent Claim
31 words
The interface circuit of claim 4, characterized in that said means for generating the third control signal comprises a pull-down resistor connected to the first portion of said signal transmitting means.
Claim 19
Dependent Claim
299 words
In a data processing system having a system controller (12) and a data store including one or more data store modules (14,18) connectable in the system through said controller, said data store receiving data store signals from said system controller, means for determining the configuration of the data store, characterized by: a duplex control signal transmission line (40) connectable between said system controller (12) and a data store module (14); a first control signal source in said system controller (12) generating a system configuration control signal (CS3) enabled during a first time period and disabled during a second time period; a second control signal source in said system controller (12) generating a data store control signal (CS2); a third control signal source coupled to said duplex control signal transmission line and generating a third control signal (CSN3) representing configuration of the data store module (14); and a control logic unit (44) in said system controller (12) including a tri-state logic element (46) receiving said data store control signal (CS2) and having an output (47) coupled to said control signal transmission line (40), said tri-state logic element (46) being responsive to said configuration control signal (CS3) to decouple the output from said control,signal transmission line during the first time period, and a first logic element having an input connected to said duplex control signal transmission line (40) and an output regenerating the third control signal during the first time period; a storage element (58) in said system controller receiving the output of said first logic element, and being responsive to the system configuration control signal (CS3) to store the regenerated third control signal, said control logic unit (44) including a second logic element (64) responsive to an output of said storage element (58) to generate another data store control signal.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.