US5822556A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Distributed completion control in a microprocessor
Assignee: International Business Machines Corp
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Filing: 1997-04-16
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Granted: 1998-10-13
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Expires: 2017-04-16
Abstract
Abstract A distributed completion control system for a microprocessor is disclosed. The system comprises a plurality of dispatch units, each of the dispatch units further comprises a dispatch queue responsive to a fetched address for receiving instructions; a plurality of control dependent tags; and means for indicating that the control dependent tags have been assigned to the appropriate instructions. The system further includes a plurality of execution units for receiving the instructions and the control dependent tags.
Inventors
- 👤 Terence Matthew Potter
- 👤 Michael Thomas Vaden
- 👤 Christopher Hans Olson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 09:36
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/38; G06F9/3836; G06F9/3851; G06F9/3854; G06F9/3858
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
212 words
A distributed completion control system for a microprocessor comprising: a plurality of dispatch units; each of the dispatch units comprising a dispatch queue responsive to a fetched address for receiving instructions; means for assigning a unique completion tag to each instruction, the completion tag assigning means being included in at least one of the dispatch units; means for providing control dependence information with regard to the instructions, the providing means being included in at least one of the dispatch units; means for associating a first instruction with a list of completion tags corresponding to a list of instructions upon which the first instruction control-depends, the associating means being included in at least one of the dispatch units; means for assigning control dependence information to appropriate instructions, the control dependence assigning means being included in at least one of the dispatch units; means for sending a second instruction's tag to each instruction as an indicator to either purge or resolve when the second instruction resolves its control flow decisions, the sending means being coupled to at least one of the dispatch units; and a plurality of execution units for receiving the instructions and the associated control dependence information and for allowing each dispatch unit to commit instructions dependent on the control dependence information.
Claim 2
Dependent Claim
212 words
A distributed completion control system for a microprocessor comprising: a plurality of dispatch units; each of the dispatch units comprising a dispatch queue responsive to a fetched address for receiving instructions; means for assigning a unique completion tag to each instruction, the completion tag assigning means being included in at least one of the dispatch units; means for providing control dependence information with regard to the instructions, the providing means being included in at least one of the dispatch units; means for associating a first instruction with a list of completion tags corresponding to a list of instructions upon which the first instruction control-depends, the associating means being included in at least one of the dispatch units; means for assigning control dependence information to appropriate instructions, the control dependence assigning means being included in at least one of the dispatch units; means for sending a second instruction's tag to each instruction as an indicator to either purge or resolve when the second instruction resolves its control flow decisions, the sending means being coupled to at least one of the dispatch units; and a plurality of execution units for receiving the instructions and the associated control dependence information and for allowing each dispatch unit to commit instructions dependent on the control dependence information.
Claim 3
Dependent Claim
29 words
The distributed completion control system of claim 1 in which the control dependence information comprises a plurality of ordered completion tags and a plurality of ordered control dependence tags.
Claim 4
Dependent Claim
28 words
The distributed completion control system of claim 2 in which the dispatch queue comprises a plurality of dispatch queue units that receives the instructions in a ordered manner.
Claim 5
Dependent Claim
38 words
The distributed completion control system of claim 3 in which the plurality of ordered completion tags and the plurality of ordered control dependence tags correspond to the ordered instructions such that the appropriate control dependent information is provided.
Claim 6
Dependent Claim
20 words
The distributed completion control system of claim 1 in which the control dependence information is utilized to commit the instruction.
Claim 7
Dependent Claim
19 words
The system of claim 1 wherein the plurality of execution units signify control-dependence resolution on at least one bus.
Claim 8
Dependent Claim
27 words
The system of claim 1, wherein if the first instruction receives a purge indicator for an instruction upon which it control-depends, then the first instruction purges itself.
Claim 9
Dependent Claim
33 words
The system of claim 1, wherein if the first instruction receives a resolve indicator for an instruction upon which it control-depends, then the instruction upon which it control-depends is marked as being resolved.
Claim 10
Dependent Claim
20 words
The system of claim 8, wherein when control dependencies of the first instruction is resolved, the first instruction can commit.
Claim 11
Dependent Claim
119 words
A dispatch unit for use in a processor comprising: a dispatch queue for receiving instructions; a unique completion tag assigned to each instruction received in the dispatch queue; control dependence tag means for providing control dependence information with regard to the instructions received in the dispatch queue; a list of completion tags corresponding to a list of instructions upon which the first instruction control-depends, wherein the list of completion tags are associated with a first instruction; completion tag assignment means for assigning the control dependence information to the appropriate instructions; and sending means for sending a second instruction's tag to each instruction as an indicator to either purge or resolve when the second instruction resolves its control flow decisions.
Claim 12
Dependent Claim
119 words
A dispatch unit for use in a processor comprising: a dispatch queue for receiving instructions; a unique completion tag assigned to each instruction received in the dispatch queue; control dependence tag means for providing control dependence information with regard to the instructions received in the dispatch queue; a list of completion tags corresponding to a list of instructions upon which the first instruction control-depends, wherein the list of completion tags are associated with a first instruction; completion tag assignment means for assigning the control dependence information to the appropriate instructions; and sending means for sending a second instruction's tag to each instruction as an indicator to either purge or resolve when the second instruction resolves its control flow decisions.
Claim 13
Dependent Claim
29 words
The dispatch unit of claim 10 in which the control dependence information comprises a plurality of sequentially ordered completion tags and a plurality of sequentially ordered control dependence tags.
Claim 14
Dependent Claim
26 words
The dispatch unit of claim 11 in which the dispatch queue comprises a plurality of dispatch queue units that receives the instructions in a ordered manner.
Claim 15
Dependent Claim
38 words
The dispatch unit of claim 12 in which the plurality of control dependence ordered completion tags and the plurality of ordered control dependence tags correspond to the ordered instructions such that the appropriate control dependent information is provided.
Claim 16
Dependent Claim
18 words
The dispatch unit of claim 10 in which the control dependence information is utilized to commit the instruction.
Claim 17
Independent Claim
113 words
A method for dispatching instructions in a processor comprising: (a) receiving instructions in a dispatch queue; (b) assigning a unique completion tag to each instruction received in the dispatch queue; (c) providing control dependence information with regard to the instructions received in the dispatch queue; (d) providing a list of completion tags corresponding to a list of instructions upon which the first instruction control-depends, wherein the list of completion tags are associated with a first instruction; (e) assigning the control dependence information to the appropriate instructions; and (f) sending a second instruction's tag to each instruction as an indicator to either purge or resolve when the second instruction resolves its control flow decisions.
Claim 18
Independent Claim
113 words
A method for dispatching instructions in a processor comprising: (a) receiving instructions in a dispatch queue; (b) assigning a unique completion tag to each instruction received in the dispatch queue; (c) providing control dependence information with regard to the instructions received in the dispatch queue; (d) providing a list of completion tags corresponding to a list of instructions upon which the first instruction control-depends, wherein the list of completion tags are associated with a first instruction; (e) assigning the control dependence information to the appropriate instructions; and (f) sending a second instruction's tag to each instruction as an indicator to either purge or resolve when the second instruction resolves its control flow decisions.
Claim 19
Dependent Claim
25 words
The method of claim 15, wherein if the first instruction receives a purge indicator for an instruction upon which it control-depends, then it purges itself.
Claim 20
Dependent Claim
29 words
The method of claim 15, wherein if the first instruction receives a resolve indicator for an instruction upon which it control-depends, then that instruction is marked as being resolved.
Claim 21
Dependent Claim
20 words
The system of claim 17, wherein when control dependencies of the first instruction is resolved, the first instruction can commit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-10-12 | 2002-04-13 | 2002-10-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-10-12 | 2006-04-13 | 2006-10-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-10-12 | 2010-04-13 | 2010-10-13 | $7700.00 | Window Closed / Lapsed |