Method for manufacturing a semiconductor device

Claim 1

A method of manufacturing a semiconductor device comprising forming a device isolation region in a semiconductor substrate; forming at least a first conductivity type impurity region in the semiconductor substrate; and forming on the semiconductor substrate a transistor including a gate insulating film, a gate electrode, source/drain regions and a channel located directly under the gate electrode, wherein the first conductivity type impurity region is formed by the steps of: an ion implantation 1 having a concentration peak at a location deeper than the bottom of the device isolation region; an ion implantation 2 having a concentration peak at a location around the bottom of the device isolation region; an ion implantation 3 having a concentration peak around the junction regions where the source/drain regions are to be formed; and an ion implantation 4 having a concentration peak on the surface or directly under the surface of the region where the channel is to be formed.

Claim 2

A method of manufacturing a semiconductor device comprising forming a device isolation region in a semiconductor substrate; forming at least a first conductivity type impurity region in the semiconductor substrate; and forming on the semiconductor substrate a transistor including a gate insulating film, a gate electrode, source/drain regions and a channel located directly under the gate electrode, wherein the first conductivity type impurity region is formed by the steps of: an ion implantation 1 having a concentration peak at a location deeper than the bottom of the device isolation region; an ion implantation 2 having a concentration peak at a location around the bottom of the device isolation region; an ion implantation 3 having a concentration peak around the junction regions where the source/drain regions are to be formed; and an ion implantation 4 having a concentration peak on the surface or directly under the surface of the region where the channel is to be formed.

Claim 4

A method of manufacturing a semiconductor device comprising forming a device isolation region deeper than 0.6 μm in a first conductivity type semiconductor substrate; forming at least a first conductivity type impurity region in the first conductivity type semiconductor substrate; and forming on the semiconductor substrate a transistor including a gate insulating film, a gate electrode, source/drain regions and a channel located directly under the gate electrode, wherein the first conductivity type impurity region is formed by the steps of: an ion implantation 1' having a concentration peak around the depth of 0.6 μm; an ion implantation 2' having a concentration peak around the depth of 0.35 μm; an ion implantation 3' having a concentration peak around the junction regions where the source/drain regions are to be formed; and an ion implantation 4' having a concentration peak on the surface or directly under the surface of the region where the channel is to be formed.

Claim 5

A method of manufacturing a semiconductor device comprising forming a device isolation region deeper than 0.6 μm in a first conductivity type semiconductor substrate; forming at least a first conductivity type impurity region in the first conductivity type semiconductor substrate; and forming on the semiconductor substrate a transistor including a gate insulating film, a gate electrode, source/drain regions and a channel located directly under the gate electrode, wherein the first conductivity type impurity region is formed by the steps of: an ion implantation 1' having a concentration peak around the depth of 0.6 μm; an ion implantation 2' having a concentration peak around the depth of 0.35 μm; an ion implantation 3' having a concentration peak around the junction regions where the source/drain regions are to be formed; and an ion implantation 4' having a concentration peak on the surface or directly under the surface of the region where the channel is to be formed.

Claim 7

A method of manufacturing a semiconductor device comprising: forming a device isolation region in a semiconductor substrate; forming plural first conductivity type impurity regions having different impurity concentrations in the semiconductor substrate; and forming on the semiconductor substrate plural transistors each having a different threshold voltage and including a gate insulating film, a gate electrode, source/drain regions and a channel located directly under the gate electrode, wherein the plural first conductivity type impurity regions having different impurity concentrations are formed by the steps of: forming a mask pattern on the semiconductor substrate, the mask pattern having an opening at least in a transistor-forming region where a transistor having threshold voltage of a first absolute value is to be formed; implanting first conductivity type impurity ions selectively into the transistor-forming region using the mask pattern formed by the steps of: an ion implantation 1 having a concentration peak at a location deeper than the bottom of the device isolation region; an ion implantation 2 having a concentration peak at a location around the bottom of the device isolation region; an ion implantation 3 having a concentration peak around the junction regions where the source/drain regions are to be formed; and an ion implantation 4 having a concentration peak on the surface or directly under the surface of the region where the channel is to be formed; and implanting first conductivity type impurity ions by ion implantation 5 that allows ions to penetrate through the mask pattern into the transistor-forming region which is covered with the mask pattern and in which a transistor having threshold voltage of a second absolute value which is smaller than the first absolute value is to be formed.

Claim 8

A method of manufacturing a semiconductor device comprising: forming a device isolation region in a semiconductor substrate; forming plural first conductivity type impurity regions having different impurity concentrations in the semiconductor substrate; and forming on the semiconductor substrate plural transistors each having a different threshold voltage and including a gate insulating film, a gate electrode, source/drain regions and a channel located directly under the gate electrode, wherein the plural first conductivity type impurity regions having different impurity concentrations are formed by the steps of: forming a mask pattern on the semiconductor substrate, the mask pattern having an opening at least in a transistor-forming region where a transistor having threshold voltage of a first absolute value is to be formed; implanting first conductivity type impurity ions selectively into the transistor-forming region using the mask pattern formed by the steps of: an ion implantation 1 having a concentration peak at a location deeper than the bottom of the device isolation region; an ion implantation 2 having a concentration peak at a location around the bottom of the device isolation region; an ion implantation 3 having a concentration peak around the junction regions where the source/drain regions are to be formed; and an ion implantation 4 having a concentration peak on the surface or directly under the surface of the region where the channel is to be formed; and implanting first conductivity type impurity ions by ion implantation 5 that allows ions to penetrate through the mask pattern into the transistor-forming region which is covered with the mask pattern and in which a transistor having threshold voltage of a second absolute value which is smaller than the first absolute value is to be formed.

Claim 10

A method of manufacturing a semiconductor device, comprising: forming a device isolation region in a semiconductor substrate; forming plural first conductivity type impurity regions having different impurity concentrations in the semiconductor substrate; and forming on the semiconductor substrate plural transistors each having a different threshold voltage and including a gate insulating film, a gate electrode, source/drain regions and a channel located directly under the gate electrode, wherein the plural first conductivity type impurity regions having different impurity concentrations are formed by the steps of: forming a mask pattern on the semiconductor substrate, the mask pattern having an opening at least in a transistor-forming region where a transistor having a threshold voltage of a first absolute value is to be formed; implanting first conductivity type impurity ions selectively into the transistor-forming region by means of the mask pattern formed by the steps of: an ion implantation 1' having a concentration peak around the depth of 0.6 μm; an ion implantation 2' having a concentration peak around the depth of 0.35 μm; an ion implantation 3' having a concentration peak around the junction regions where the source/drain regions are to be formed; and an ion implantation 4' having a concentration peak on the surface or directly under the surface of the region where the channel is to be formed; and implanting first conductivity type impurity ions by ion implantation 5 that allows ions to penetrate through the mask pattern into the transistor-forming region which is covered with the mask pattern and in which a transistor having a threshold voltage of a second absolute value which is smaller than the first absolute value is to be formed.

Claim 11

A method of manufacturing a semiconductor device, comprising: forming a device isolation region in a semiconductor substrate; forming plural first conductivity type impurity regions having different impurity concentrations in the semiconductor substrate; and forming on the semiconductor substrate plural transistors each having a different threshold voltage and including a gate insulating film, a gate electrode, source/drain regions and a channel located directly under the gate electrode, wherein the plural first conductivity type impurity regions having different impurity concentrations are formed by the steps of: forming a mask pattern on the semiconductor substrate, the mask pattern having an opening at least in a transistor-forming region where a transistor having a threshold voltage of a first absolute value is to be formed; implanting first conductivity type impurity ions selectively into the transistor-forming region by means of the mask pattern formed by the steps of: an ion implantation 1' having a concentration peak around the depth of 0.6 μm; an ion implantation 2' having a concentration peak around the depth of 0.35 μm; an ion implantation 3' having a concentration peak around the junction regions where the source/drain regions are to be formed; and an ion implantation 4' having a concentration peak on the surface or directly under the surface of the region where the channel is to be formed; and implanting first conductivity type impurity ions by ion implantation 5 that allows ions to penetrate through the mask pattern into the transistor-forming region which is covered with the mask pattern and in which a transistor having a threshold voltage of a second absolute value which is smaller than the first absolute value is to be formed.