Merging integrated circuit mask databases formed by different design rules through global mask database edits

Claim 1

A method of combining polygon databases defining mask sets of at least first and second integrated circuit cells to produce a polygon database defining a mask set for a single integrated circuit that combines the functions of the first and second integrated circuit cells, wherein said databases define the respective first and second cells with at least one design rule specified differently, comprising the steps of: editing the polygon databases for at least one of the first and second integrated circuit cells by making at least one global change to its polygon data in a manner to cause said at least one design rule to be specified the same in the databases of at said at least first and second cells, and combining the polygon databases in a manner that the data of the first and second cells occupy non-overlapping first and second respective mask area regions of the combined integrated circuit mask set.

Claim 2

A method of combining polygon databases defining mask sets of at least first and second integrated circuit cells to produce a polygon database defining a mask set for a single integrated circuit that combines the functions of the first and second integrated circuit cells, wherein said databases define the respective first and second cells with at least one design rule specified differently, comprising the steps of: editing the polygon databases for at least one of the first and second integrated circuit cells by making at least one global change to its polygon data in a manner to cause said at least one design rule to be specified the same in the databases of at said at least first and second cells, and combining the polygon databases in a manner that the data of the first and second cells occupy non-overlapping first and second respective mask area regions of the combined integrated circuit mask set.

Claim 6

The method according to any one of claims 1-4, inclusive, wherein the editing step includes repositioning edges of the polygons of the database being edited.

Claim 7

The method according to any one of claims 1-4, inclusive, wherein the editing step includes changing at least one mask designation number of the database being edited.

Claim 8

The method according to any one of claims 1-4, inclusive, wherein the editing step includes simultaneously changing the size of a plurality of the masks of the database being edited.

Claim 9

The method according to any one of claims 1-4, inclusive, wherein the editing step includes changing at least one mask that defines areas of diffusion to define a different type of CMOS diffusion process.

Claim 10

The method according to any one of claims 1-4, inclusive, wherein the editing step includes moving regions that designate areas of one layer to designate areas of another layer, and conversely, moving regions that designate areas of said another layer to designate areas of said one layer.

Claim 11

A method of editing an integrated circuit mask layout database that has been formed by combining databases of mask polygon layouts of at least two integrated circuit cells in non-overlapping regions, comprising the following steps performed on a computer with a data manipulation software program: defining data of a phantom mask of the combined integrated circuit mask layouts that outlines a region coincident with only one of said at least two circuit cells, merging the phantom mask data and at least some of the combined integrated circuit mask polygon layout data, and editing the merged polygon database of the mask layout of said one of the two circuit cells by making a global change to its polygon data, thereby to globally change the polygon data of one of the at least two integrated circuit cells.

Claim 12

A method of editing an integrated circuit mask layout database that has been formed by combining databases of mask polygon layouts of at least two integrated circuit cells in non-overlapping regions, comprising the following steps performed on a computer with a data manipulation software program: defining data of a phantom mask of the combined integrated circuit mask layouts that outlines a region coincident with only one of said at least two circuit cells, merging the phantom mask data and at least some of the combined integrated circuit mask polygon layout data, and editing the merged polygon database of the mask layout of said one of the two circuit cells by making a global change to its polygon data, thereby to globally change the polygon data of one of the at least two integrated circuit cells.

Claim 14

A method of combining polygon databases defining, with at least one different design rule, mask sets of at least first and second integrated circuit cells to produce a polygon database defining a mask set for a single integrated circuit that combines the functions of the first and second integrated circuit cells, comprising the steps of: (a) separately editing the polygon databases for each of the first and second integrated circuit cells by making a global change to its polygon data, (b) combining the edited databases in a manner that the edited polygon data of the first and second cells occupy non-overlapping first and second respective mask area regions of the combined integrated circuit mask set, (c) defining data of a phantom mask of the combined integrated circuit mask set that outlines the region of one of the first or second mask area regions, (d) merging the phantom mask data and at least some of the combined integrated circuit mask set data, and (e) editing the merged polygon database of the mask set of one of the first or second mask area regions by making a global change to its polygon data, thereby to globally change the polygon data of one of the first and second mask area regions.

Claim 15

A method of combining polygon databases defining, with at least one different design rule, mask sets of at least first and second integrated circuit cells to produce a polygon database defining a mask set for a single integrated circuit that combines the functions of the first and second integrated circuit cells, comprising the steps of: (a) separately editing the polygon databases for each of the first and second integrated circuit cells by making a global change to its polygon data, (b) combining the edited databases in a manner that the edited polygon data of the first and second cells occupy non-overlapping first and second respective mask area regions of the combined integrated circuit mask set, (c) defining data of a phantom mask of the combined integrated circuit mask set that outlines the region of one of the first or second mask area regions, (d) merging the phantom mask data and at least some of the combined integrated circuit mask set data, and (e) editing the merged polygon database of the mask set of one of the first or second mask area regions by making a global change to its polygon data, thereby to globally change the polygon data of one of the first and second mask area regions.

Claim 17

A method of producing a mask set of a single integrated electronic circuit chip that combines the functions of at least first and second separate existing integrated circuit cells, comprising the steps of: receiving at least first and second mask set computer databases for respective of the at least first and second existing integrated circuit cells, wherein said databases define the respective first and second circuits with at least one design rule specified differently, editing one of the at least first and second existing databases by making at least one global change to data of at least one mask thereof in a manner to eliminate the difference in how said at least one design rule is specified in said databases, combining the at least first and second databases in a manner that the data of the first and second cells occupy non-overlapping first and second respective mask area regions of the combined integrated circuit mask set, and generating an optical mask set from said combined database.

Claim 18

A method of producing a mask set of a single integrated electronic circuit chip that combines the functions of at least first and second separate existing integrated circuit cells, comprising the steps of: receiving at least first and second mask set computer databases for respective of the at least first and second existing integrated circuit cells, wherein said databases define the respective first and second circuits with at least one design rule specified differently, editing one of the at least first and second existing databases by making at least one global change to data of at least one mask thereof in a manner to eliminate the difference in how said at least one design rule is specified in said databases, combining the at least first and second databases in a manner that the data of the first and second cells occupy non-overlapping first and second respective mask area regions of the combined integrated circuit mask set, and generating an optical mask set from said combined database.

Claim 22

A method of producing a set of masks to manufacture a single integrated electronic circuit from at least first and second polygon databases that respectively define at least first and second sets of a plurality of masks used to make first and second integrated circuits, respectively, wherein polygons on corresponding masks of said first and second sets are formed differently with respect to one or more design features of (a) whether a p-type or an n-type diffusion is defined, (b) their integrated circuit layer number, or (c) whether a CMOS process is defined to be a p-well, n-well or twin well type, comprising the steps of: editing polygon data of at least one mask of one of the first or second databases by a single command of pattern generation computer software in a manner to eliminate a difference in one of said design features between said first and second polygon databases, combining the first and second polygon databases in a manner to form the first and second integrated circuits in non-overlapping first and second respective mask area regions of the single integrated electronic circuit set of masks, and generating from the combined databases a set of masks to manufacture the single integrated electronic circuit.

Claim 23

A method of producing a set of masks to manufacture a single integrated electronic circuit from at least first and second polygon databases that respectively define at least first and second sets of a plurality of masks used to make first and second integrated circuits, respectively, wherein polygons on corresponding masks of said first and second sets are formed differently with respect to one or more design features of (a) whether a p-type or an n-type diffusion is defined, (b) their integrated circuit layer number, or (c) whether a CMOS process is defined to be a p-well, n-well or twin well type, comprising the steps of: editing polygon data of at least one mask of one of the first or second databases by a single command of pattern generation computer software in a manner to eliminate a difference in one of said design features between said first and second polygon databases, combining the first and second polygon databases in a manner to form the first and second integrated circuits in non-overlapping first and second respective mask area regions of the single integrated electronic circuit set of masks, and generating from the combined databases a set of masks to manufacture the single integrated electronic circuit.