Input/output buffer type ATM switch

Claim 1

An ATM switch having an input buffer memory and an output buffer memory for storing cells at each of a plurality of input ports and a plurality of output ports, and the cells inputted from each of input ports being switched and distributed to the output ports by a main body of the switch arranged between each of the input ports and each of the output ports, said ATM switch comprising: an output buffer means corresponding to each of the output port for storing cells to be outputted to the output port comprising; a first logical queue containing a plurality of first: priority queues for storing cells depending on traffic priority indicated by the cell inputted to the output buffer means; an idle queue for supervising remaining capacity to be used of the first logical queue, and for generating a plurality of overflow signals corresponding to a plurality of predetermined threshold values of remaining capacity depending on defining congestion states of the output buffer means, each of the overflow signals containing discriminating information of the output buffer means as origin of the overflow signal being generated; an input buffer means corresponding to each of the input port for storing cells to be outputted to the main body of the switch comprising; a plurality of second logical queues, each corresponding to each of the output ports, and each containing a plurality of second priority queues for storing cells depending on traffic priority indicated by the cell inputted to the input buffer means; a control means for stopping cell output from the second priority queues, having predetermined traffic priority corresponding to the congestion state represented by the overflow signal being received, corresponding to the output buffer means generating the overflow signal, unless otherwise other higher second priority queues contain no cell to be outputted.