Patent US5773360A successfully refreshed from Google Patents.
US5773360A
Expired / Lapsed
US
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Reduction of surface contamination in post-CMP cleaning
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1996-10-18
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Granted: 1998-06-30
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Expires: 2016-10-18
Abstract
Abstract Chemical-mechanical polishing is followed with a scrubbing procedure for the removal of any particulate contaminants. Scrubbing is succeeded by a plasma etching step, using a parallel electrode plasma etcher, a downstream plasma etcher, or similar apparatus. Plasma etching is performed for about 30 seconds using CF4 as the etching gas, so that about 300 Angstroms of the post CMP surface is removed. This results in the almost total elimination of residual mobile ions from the polished surface without the introduction of microgrooves and similar blemishes as is often the case when HF is used for this purpose.
Inventors
- 👤 Chung-Long Chang
- 👤 Chen-Hua Yu
- 👤 Syun-Ming Jang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 22:05
CPC Classifications
H; H10; H10P; H10P95/00; H10P95/06; H10P95/062; Y; Y10; Y10S; Y10S438/00; Y10S438/906; Y10S438/959
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
85 words
A process for chem.-mech. polishing comprising the steps of: providing an integrated circuit having an upper layer of PETEOS or BPTEOS oxide that is non-planar; providing a slurry and an etchant; using said slurry and etchant, chem.-mech. polishing said upper layer to remove a first thickness of said upper layer; scrubbing said polished upper layer to remove particle contaminants; providing a plasma etcher; and removing a second thickness of said upper layer by means of dry etching in a gas plasma in said plasma etcher.
Claim 2
Dependent Claim
85 words
A process for chem.-mech. polishing comprising the steps of: providing an integrated circuit having an upper layer of PETEOS or BPTEOS oxide that is non-planar; providing a slurry and an etchant; using said slurry and etchant, chem.-mech. polishing said upper layer to remove a first thickness of said upper layer; scrubbing said polished upper layer to remove particle contaminants; providing a plasma etcher; and removing a second thickness of said upper layer by means of dry etching in a gas plasma in said plasma etcher.
Claim 3
Dependent Claim
12 words
The process of claim 1 wherein the slurry comprises aluminum oxide particles.
Claim 4
Dependent Claim
14 words
The process of claim 1 wherein the etchant comprises potassium hydroxide or ammonium hydroxide.
Claim 5
Dependent Claim
20 words
The process of claim 1 wherein the first thickness of removed upper layer is between about 5,000 and 15,000 Angstroms.
Claim 6
Dependent Claim
20 words
The process of claim 1 wherein the second thickness of removed upper layer is between about 50 and 500 Angstroms.
Claim 7
Dependent Claim
16 words
The process of claim 1 wherein the gas plasma comprises CF 4 or CHF 3 .
Claim 8
Dependent Claim
15 words
The process of claim 1 wherein said plasma etcher comprises a parallel electrode dry etcher.
Claim 9
Dependent Claim
14 words
The process of claim 1 wherein said plasma etcher comprises a downstream plasma etcher.
Claim 10
Dependent Claim
17 words
The process of claim 1 wherein the scrubbing step is performed in the presence of ammonium hydroxide.
Claim 11
Dependent Claim
77 words
A process for manufacturing an integrated circuit comprising the steps of: providing a silicon substrate; forming active and passive devices on said substrate; forming conductive wiring on said substrate; depositing a passivation layer of PETEOS or BPTEOS oxide, having a surface, over said devices and said wiring; chem.-mech. polishing said passivation layer until said surface is planar; scrubbing said polished surface to remove particulate contaminants; and then, for a period of time, dry etching said scrubbed surface.
Claim 12
Dependent Claim
77 words
A process for manufacturing an integrated circuit comprising the steps of: providing a silicon substrate; forming active and passive devices on said substrate; forming conductive wiring on said substrate; depositing a passivation layer of PETEOS or BPTEOS oxide, having a surface, over said devices and said wiring; chem.-mech. polishing said passivation layer until said surface is planar; scrubbing said polished surface to remove particulate contaminants; and then, for a period of time, dry etching said scrubbed surface.
Claim 13
Dependent Claim
22 words
The process of claim 10 wherein said passivation layer is deposited to a thickness that is between about 9,000 and 25,000 Angstroms.
Claim 14
Dependent Claim
17 words
The process of claim 10 wherein said period of time is between about 0.2 and 5 minutes.
Claim 15
Dependent Claim
44 words
The process of claim 10 wherein the step of dry etching further comprises: providing a reactive gas; forming a plasma in said gas by means of RF excitation through an RF circuit; and allowing said plasma to come into contact with said scrubbed surface.
Claim 16
Dependent Claim
15 words
The process of claim 13 wherein the silicon substrate is part of the RF circuit.
Claim 17
Dependent Claim
23 words
The process of claim 13 wherein the plasma is formed in an area removed from the silicon substrate and then conveyed to it.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-06-29 | 2001-12-29 | 2002-06-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-06-29 | 2005-12-29 | 2006-06-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-06-29 | 2009-12-29 | 2010-06-30 | $7700.00 | Window Closed / Lapsed |