Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
157 words
A method of fabricating an integrated circuit comprising: forming a gate electrode over a semiconductor substrate, the semiconductor substrate having a source region adjacent to a first side of the gate electrode and having a drain region adjacent to a second side of the gate electrode; forming a source mask extending over the drain region of the semiconductor substrate; implanting an implant species into the source region of the semiconductor substrate to form an amorphous implant layer of the semiconductor substrate, the amorphous implant layer being self-aligned with the source mask and extending through the exposed region of the semiconductor substrate and the source region of the semiconductor substrate; and implanting a source implant into the exposed region of the semiconductor substrate and the source region of the semiconductor substrate to form a source implant layer of the semiconductor substrate, the source implant layer extending a shallower depth into the semiconductor substrate than the amorphous implant layer.
Claim 2
Independent Claim
157 words
A method of fabricating an integrated circuit comprising: forming a gate electrode over a semiconductor substrate, the semiconductor substrate having a source region adjacent to a first side of the gate electrode and having a drain region adjacent to a second side of the gate electrode; forming a source mask extending over the drain region of the semiconductor substrate; implanting an implant species into the source region of the semiconductor substrate to form an amorphous implant layer of the semiconductor substrate, the amorphous implant layer being self-aligned with the source mask and extending through the exposed region of the semiconductor substrate and the source region of the semiconductor substrate; and implanting a source implant into the exposed region of the semiconductor substrate and the source region of the semiconductor substrate to form a source implant layer of the semiconductor substrate, the source implant layer extending a shallower depth into the semiconductor substrate than the amorphous implant layer.
Claim 3
Dependent Claim
55 words
A method according to claim 1, wherein: forming the source mask further includes extending the source mask to partially cover the gate electrode, a portion of the gate electrode partially covered being a protected portion of the gate electrode and a portion of the gate electrode uncovered being an exposed portion of the gate electrode.
Claim 4
Dependent Claim
33 words
A method according to claim 1, wherein: implanting the amorphous implant layer includes implanting an implant species selected from the species including silicon (Si), argon (Ar), germanium (Ge), cobalt (Co) and carbon (C).
Claim 5
Dependent Claim
41 words
A method according to claim 1, wherein: implanting the amorphous implant layer includes implanting argon with a dosage in the range of 1×10 15 to 5×10 16 atoms/cm 2 and an energy in the range of 10 to 100 kiloelectron-volts (keV).
Claim 6
Dependent Claim
35 words
A method according to claim 1, further comprising: removing the source mask; and forming lightly-doped drain (LDD) regions in the semiconductor substrate, the LDD regions being implanted to a depth shallower than the source implant.
Claim 7
Dependent Claim
30 words
A method according to claim 5, further comprising: forming spacers on lateral edges of the gate electrodes; implanting the source/drain regions of the semiconductor substrate; and annealing the semiconductor substrate.
Claim 8
Dependent Claim
25 words
A method according to claim 1, further comprising: annealing the semiconductor substrate after implanting the amorphous implant layer and prior to implanting the source implant.
Claim 9
Dependent Claim
36 words
A method according to claim 1, further comprising: removing the exposed portion of the gate electrode previous to implanting the amorphous layer, the removed portion of the gate electrode exposing a region of the semiconductor substrate.
Claim 10
Dependent Claim
36 words
A method according to claim 1, further comprising: removing the exposed portion of the gate electrode subsequent to implanting the amorphous layer, the removed portion of the gate electrode exposing a region of the semiconductor substrate.
Claim 11
Independent Claim
219 words
A method of fabricating an integrated circuit comprising: forming a gate electrode over a semiconductor substrate, the semiconductor substrate having a source region adjacent to a first side of the gate electrode and having a drain region adjacent to a second side of the gate electrode; forming a source mask extending over the drain region of the semiconductor substrate and extending to partially cover the gate electrode, a portion of the gate electrode partially covered being a protected portion of the gate electrode and a portion of the gate electrode uncovered being an exposed portion of the gate electrode; removing the exposed portion of the gate electrode, the removed portion of the gate electrode exposing a region of the semiconductor substrate; implanting an implant species into the source region of the semiconductor substrate to form an amorphous implant layer of the semiconductor substrate, the amorphous implant layer being self-aligned with the source mask and extending through the exposed region of the semiconductor substrate and the source region of the semiconductor substrate; and implanting a source implant into the exposed region of the semiconductor substrate and the source region of the semiconductor substrate to form a source implant layer of the semiconductor substrate, the source implant layer extending a shallower depth into the semiconductor substrate than the amorphous implant layer.
Claim 12
Independent Claim
219 words
A method of fabricating an integrated circuit comprising: forming a gate electrode over a semiconductor substrate, the semiconductor substrate having a source region adjacent to a first side of the gate electrode and having a drain region adjacent to a second side of the gate electrode; forming a source mask extending over the drain region of the semiconductor substrate and extending to partially cover the gate electrode, a portion of the gate electrode partially covered being a protected portion of the gate electrode and a portion of the gate electrode uncovered being an exposed portion of the gate electrode; removing the exposed portion of the gate electrode, the removed portion of the gate electrode exposing a region of the semiconductor substrate; implanting an implant species into the source region of the semiconductor substrate to form an amorphous implant layer of the semiconductor substrate, the amorphous implant layer being self-aligned with the source mask and extending through the exposed region of the semiconductor substrate and the source region of the semiconductor substrate; and implanting a source implant into the exposed region of the semiconductor substrate and the source region of the semiconductor substrate to form a source implant layer of the semiconductor substrate, the source implant layer extending a shallower depth into the semiconductor substrate than the amorphous implant layer.
Claim 13
Dependent Claim
21 words
A method according to claim 10, wherein: removing the exposed portion of the gate electrode precedes implanting the amorphous implant layer.
Claim 14
Dependent Claim
21 words
A method according to claim 10, wherein: implanting the amorphous implant layer precedes removing the exposed portion of the gate electrode.
Claim 15
Dependent Claim
33 words
A method according to claim 10, wherein: implanting the amorphous implant layer includes implanting an implant species selected from the species including silicon (Si), argon (Ar), germanium (Ge), cobalt (Co) and carbon (C).
Claim 16
Dependent Claim
41 words
A method according to claim 10, wherein: implanting the amorphous implant layer includes implanting argon with a dosage in the range of 1×10 15 to 5×10 16 atoms/cm 2 and an energy in the range of 10 to 100 kiloelectron-volts (keV).
Claim 17
Dependent Claim
35 words
A method according to claim 10, further comprising: removing the source mask; and forming lightly-doped drain (LDD) regions in the semiconductor substrate, the LDD regions being implanted to a depth shallower than the source implant.
Claim 18
Dependent Claim
30 words
A method according to claim 15, further comprising: forming spacers on lateral edges of the gate electrodes; implanting the source/drain regions of the semiconductor substrate; and annealing the semiconductor substrate.
Claim 19
Dependent Claim
25 words
A method according to claim 10, further comprising: annealing the semiconductor substrate after implanting the amorphous implant layer and prior to implanting the source implant.