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US5766967A
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Method for fabricating a submicron T-shaped gate
Assignee: Industrial Technology Research Institute
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Filing: 1996-10-07
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Granted: 1998-06-16
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Expires: 2016-10-07
Abstract
Abstract A method for fabricating submicron T-shaped gates for the field-effect transistors disclosed, which can be accomplished by using a tri-layer positive photoresist with a single electron beam exposure and a single development step. Therefore, the cost can be reduced and the yield can be raised for fabricating high speed field-effect transistors. The method comprises the steps of: (i) sequentially spinning coating a first photoresist layer, a second photoresist layer and a third photoresist layer on the top of epitaxial layers, wherein the second photoresist layer is thicker than the third photoresist layer, and the third photoresist layer is not thicker than the first photoresist layer, the viscosity of the second photoresist layer is larger than that of the first and third photoresist layers, and the electron beam sensitivity of the second photoresist layer is larger than that of the first and the third photoresist layers; (ii) exposing all the gate stripe region of the photoresist layers by a single electron beam exposure; (iii) using a developer to develop all the exposed positions of the three photoresist layers by a single development step, so that a T-shaped opening is formed; (iv) etching and removing a contact layer of the epitaxial layers under the T-shaped opening; (v) evaporating gate metal layers to cover the third photoresist layer and to fill the T-shaped opening; (vi) removing the photoresist layers to lift off the evaporated metal layers so that the submicron T-shaped gate is obtained.
Inventors
- 👤 Yeong-Lin Lai
- 👤 Hung-Ping D. Yang
- 👤 Chun-Yen Chang
- 👤 Edward Y. Chang
- 👤 Kazumitsu Nakamura
- 👤 Rico Chang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 02:40
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/061; H10D30/0612; H10D30/015; H10D64/00; H10D64/01; H10D64/012; H10D64/0124; H10D64/0125; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/948; Y10S438/951
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
250 words
A method for fabricating a submicron T-shaped gate, which can be applied to high-speed field-effect transistors, comprising the steps of: (i) growing epitaxial layers on a semiconductor substrate, then sequentially forming a first photoresist layer, a second photoresist layer and a third photoresist layer on the epitaxial layers, wherein the second photoresist layer is thicker than the third photoresist layer, and the third photoresist layer is not thicker than the first photoresist layer, the viscosity of the second photoresist layer is larger than that of the first photoresist layer and the third photoresist layer, and the electron beam sensitivity of the second photoresist layer is larger than that of the first photoresist layer and the third photoresist layer; (ii) exposing the first photoresist layer, the second photoresist layer and the third photoresist layer by an electron beam lithography system, by a single exposure; (iii) using a developer to develop exposed positions of the first photoresist layer, the second photoresist layer and the third photoresist layer by a single development step to remove the exposed potions of the tri-layer photoresist and form a T-shaped opening; (iv) etching and removing a contact layer of the epitaxial layers under the T-shaped opening; (v) evaporating Schottky metal layers to cover the third photoresist layer and fill the T-shaped opening; (vi) removing the first photoresist layer, the second photoresist layer, and the third photoresist layer to lift off the metal layers evaporated on the third photoresist layer so that the submicron T-shaped gate is obtained.
Claim 2
Independent Claim
250 words
A method for fabricating a submicron T-shaped gate, which can be applied to high-speed field-effect transistors, comprising the steps of: (i) growing epitaxial layers on a semiconductor substrate, then sequentially forming a first photoresist layer, a second photoresist layer and a third photoresist layer on the epitaxial layers, wherein the second photoresist layer is thicker than the third photoresist layer, and the third photoresist layer is not thicker than the first photoresist layer, the viscosity of the second photoresist layer is larger than that of the first photoresist layer and the third photoresist layer, and the electron beam sensitivity of the second photoresist layer is larger than that of the first photoresist layer and the third photoresist layer; (ii) exposing the first photoresist layer, the second photoresist layer and the third photoresist layer by an electron beam lithography system, by a single exposure; (iii) using a developer to develop exposed positions of the first photoresist layer, the second photoresist layer and the third photoresist layer by a single development step to remove the exposed potions of the tri-layer photoresist and form a T-shaped opening; (iv) etching and removing a contact layer of the epitaxial layers under the T-shaped opening; (v) evaporating Schottky metal layers to cover the third photoresist layer and fill the T-shaped opening; (vi) removing the first photoresist layer, the second photoresist layer, and the third photoresist layer to lift off the metal layers evaporated on the third photoresist layer so that the submicron T-shaped gate is obtained.
Claim 3
Dependent Claim
33 words
The method as claimed in claim 1, further comprising a step of: prebaking photoresist layers after spinning coating each of the first photoresist layer, the second photoresist layer, and the third photoresist layer.
Claim 4
Dependent Claim
24 words
The method as claimed in claim 1, wherein, the first photoresist layer and the third photoresist layer comprise 80% cyclohexanone and 20% polymethylisopropenyl ketone.
Claim 5
Dependent Claim
22 words
The method as claimed in claim 1, wherein, the second photoresist layer comprises 80% ethylene glycol monoethyl ether acetate and 20% resin.
Claim 6
Dependent Claim
13 words
The method as claimed in claim 1, wherein, the semiconductor substrate is GaAs.
Claim 7
Dependent Claim
13 words
The method as claimed in claim 1, wherein, the semiconductor substrate is InP.
Claim 8
Dependent Claim
31 words
The method as claimed in claim 1, wherein, the total thickness of the first photoresist layer, the second photoresist layer, and the third photoresist layer is about 0.5 to 1.5 μm.
Claim 9
Dependent Claim
23 words
The method as claimed in claim 1, wherein, the linewidth of opening at the first photoresist layer is about 0.1 to 0.5 μm.
Claim 10
Dependent Claim
15 words
The method as claimed in claim 1, wherein, the Schottky metal layers can be Ti/Pt/Au.
Claim 11
Dependent Claim
19 words
The method as claimed in claim 1, wherein, the developer is methylisobutyl ketone, and is diluted by xylene solution.
Claim 12
Dependent Claim
22 words
The method as claimed in claim 1, wherein, the Schottky metal layers have a total thickness of about 3000 to 5000 Angstroms.
Claim 13
Dependent Claim
39 words
The method as claimed in claim 3, wherein, the viscosity of the first photoresist layer and the third photoresist layer can be varied from 30 to 50 mPa.s, depending on the weight composition ratio of cyclohexanone and polymethylisopropenyl ketone.
Claim 14
Dependent Claim
37 words
The method as claimed in claim 4, wherein, the viscosity of the second photoresist layer can be varied from 150 to 200 mPa.s, depending on the weight composition ratio of ethylene glycol monoethyl ether acetate and resin.
Claim 15
Dependent Claim
32 words
The method as claimed in claim 7, wherein, the aspect ratio of the linewidths of openings of the second photoresist layer and the first photoresist layer is somewhere between 2:1 and 4:1.
Claim 16
Dependent Claim
21 words
The method as claimed in claim 1, wherein, the structure of the epitaxial layers is a structure of metal-semiconductor field-effect transistor.
Claim 17
Dependent Claim
23 words
The method as claimed in claim 1, wherein, the structure of the epitaxial layers is a structure of high electron mobility field-effect transistor.
Claim 18
Dependent Claim
21 words
The method as claimed in claim 1, wherein, the structure of the epitaxial layers is a structure of heterostructure field-effect transistor.
Claim 19
Dependent Claim
13 words
The method as claimed in claim 1, wherein, the semiconductor substrate is Si.
References Cited (Backward Citations)
US4532002A
Cited
US4959326A
Cited
US5185277A
Cited
US5288654A
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US5240878A
Cited
US5155053A
Cited
US5432125A
Cited
US5500381A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-06-15 | 2001-12-15 | 2002-06-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-06-15 | 2005-12-15 | 2006-06-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-06-15 | 2009-12-15 | 2010-06-16 | $7700.00 | Window Closed / Lapsed |