Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
203 words
A frequency synthesizer comprising: a frequency source for digitally generating a variable frequency signal; a first phase lock loop circuit having a first predetermined loop bandwidth coupled to said frequency source; a second phase lock loop circuit having a second predetermined loop bandwidth greater than said first predetermined loop bandwidth coupled to said first phase lock loop circuit; a power splitter disposed between said frequency source and said first phase lock loop circuit, said power splitter having an input and first and second outputs, said power splitter input coupled to an output of said frequency source and said power splitter first output coupled to said first phase lock loop circuit; a first switch, responsive to a first switch control signal, disposed between said first phase lock loop circuit and said second phase lock loop circuit; a summer disposed between said first switch and said second phase lock loop circuit, said summer having first and second inputs and an output, said summer first input coupled to said first switch and said summer output coupled to said second phase lock loop circuit; and a second switch, responsive to a second switch control signal, coupled to said power splitter second output and said summer second input.
Claim 2
Dependent Claim
203 words
A frequency synthesizer comprising: a frequency source for digitally generating a variable frequency signal; a first phase lock loop circuit having a first predetermined loop bandwidth coupled to said frequency source; a second phase lock loop circuit having a second predetermined loop bandwidth greater than said first predetermined loop bandwidth coupled to said first phase lock loop circuit; a power splitter disposed between said frequency source and said first phase lock loop circuit, said power splitter having an input and first and second outputs, said power splitter input coupled to an output of said frequency source and said power splitter first output coupled to said first phase lock loop circuit; a first switch, responsive to a first switch control signal, disposed between said first phase lock loop circuit and said second phase lock loop circuit; a summer disposed between said first switch and said second phase lock loop circuit, said summer having first and second inputs and an output, said summer first input coupled to said first switch and said summer output coupled to said second phase lock loop circuit; and a second switch, responsive to a second switch control signal, coupled to said power splitter second output and said summer second input.
Claim 3
Dependent Claim
26 words
The frequency synthesizer of claim 1 further comprising a switching control circuit having first and second outputs respectively coupled to said first and said second switches.
Claim 4
Dependent Claim
76 words
The frequency synthesizer of claim 2 wherein said switching control circuit generates first and second pairs of switch control signals which are provided to said first and second switches and wherein said first and second switches are responsive to said first pair of switch control signals for closing said second switch and opening said first switch, and responsive to said second pair of switch control signals for closing said first switch and opening said second switch.
Claim 5
Dependent Claim
34 words
The frequency synthesizer of claim 3 wherein said first and second switches are responsive to said first pair of switch control signals by, in sequence, closing said second switch then opening said first switch.
Claim 6
Dependent Claim
34 words
The frequency synthesizer of claim 3 wherein said first and second switches are responsive to said second pair of switch control signals by, in sequence, closing said first switch then opening said second switch.
Claim 7
Independent Claim
111 words
A method of frequency synthesis comprising the steps of: digitally generating a variable frequency reference signal; splitting said variable frequency reference signal into a first branch reference signal and a second branch reference signal; filtering said first branch reference signal in a first phase lock loop circuit having a first predetermined loop bandwidth; applying said filtered first branch reference signal to a reference input of a second phase lock loop circuit having a second predetermined loop bandwidth in response to a first switch control signal; and applying said second branch reference signal to said reference input of said second phase lock loop circuit in response to a second switch control signal.
Claim 8
Independent Claim
111 words
A method of frequency synthesis comprising the steps of: digitally generating a variable frequency reference signal; splitting said variable frequency reference signal into a first branch reference signal and a second branch reference signal; filtering said first branch reference signal in a first phase lock loop circuit having a first predetermined loop bandwidth; applying said filtered first branch reference signal to a reference input of a second phase lock loop circuit having a second predetermined loop bandwidth in response to a first switch control signal; and applying said second branch reference signal to said reference input of said second phase lock loop circuit in response to a second switch control signal.
Claim 9
Dependent Claim
17 words
The method of claim 6 wherein said first predetermined bandwidth is less than said second predetermined bandwidth.
Claim 10
Dependent Claim
15 words
The method of claim 6 wherein said first predetermined bandwidth is substantially equal to unity.