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US5751050A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device having a polysilicon resistor element with increased stability and method of fabricating same

Assignee: Renesas Electronics Corp
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Filing: 1996-10-24
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Granted: 1998-05-12
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Expires: 2016-10-24
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Abstract

Abstract A base insulator film comprised of a silicon oxide film or the like is formed on the surface of a silicon substrate, and a non-doped polysilicon film (resistor layer) is selectively formed on the base insulator film by thermal CVD. A first silicon oxide film and a BPSG film are sequentially formed on the entire surfaces of the base insulator film and the polysilicon film. Then, two openings which reach the polysilicon film are formed in the BPSG film and the first silicon oxide film, and an impurity is selectively doped into the surface of the polysilicon film through those openings. As a result, a high-resistance section is formed in the polysilicon film between the two openings. Then, the openings are filled with metal layers, and then metal wires to be connected to the metal layers are formed on the surface of the BPSG film. Then, a second silicon oxide film is formed on the entire surfaces of the BPSG film and the metal wires by bias ECR (Electron Cyclotron Resonance)--CVD having a high electric field to coat the metal wires and the like. The high electric field ECR-CVD deposition increases the hydrogen atomic concentration of the polysilicon resistor layer so as to stabilize the resistance against diffusion of lower atomic concentrations of incidental hydrogen atoms from various other interlayer insulating layers.

Inventors

  • 👤 Hiraku Ishikawa
  • 👤 Tatsuya Usami

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 13:46
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/47; H10D84/00; H10D84/80; H10D84/811; H10D84/817; H10D88/00

Claims Analysis

Total Claims: 17
Claim 1
Independent Claim 93 words
A semiconductor device having a resistor element comprising: a substrate; a resistor layer formed of polysilicon on said substrate; and a first interlayer insulator film formed on said resistor layer, said first interlayer insulator film being comprised of a silicon oxide film formed by chemical vapor deposition which applies a high-frequency electric field so that hydrogen atomic concentration of said resistor layer is increased to be equal to or greater than 6×10 18 /cm 3 and the resistance of said resistor layer is stabilized against diffusion of lower concentrations of incidental hydrogen atoms.
Claim 2
Dependent Claim 93 words
A semiconductor device having a resistor element comprising: a substrate; a resistor layer formed of polysilicon on said substrate; and a first interlayer insulator film formed on said resistor layer, said first interlayer insulator film being comprised of a silicon oxide film formed by chemical vapor deposition which applies a high-frequency electric field so that hydrogen atomic concentration of said resistor layer is increased to be equal to or greater than 6×10 18 /cm 3 and the resistance of said resistor layer is stabilized against diffusion of lower concentrations of incidental hydrogen atoms.
Claim 3
Dependent Claim 24 words
The semiconductor device according to claim 1, wherein said chemical vapor deposition for applying said high-frequency electric field is bias ECR (Electron Cyclotron Resonance)--CVD.
Claim 4
Dependent Claim 25 words
The semiconductor device according to claim 1, further comprising a second interlayer insulator film formed between said resistor layer and said first interlayer insulator film.
Claim 5
Dependent Claim 35 words
The semiconductor device according to claim 3, wherein said second interlayer insulator film is comprised of one or both of a silicon oxide film and a BPSG film, formed by atmospheric pressure chemical vapor deposition.
Claim 6
Dependent Claim 23 words
The semiconductor device according to claim 1, wherein said resistor layer is formed of non-doped polysilicon which is not doped with an impurity.
Claim 7
Dependent Claim 43 words
A semiconductor device, comprising: a non-doped polysilicon resistor formed on a substrate and having hydrogen atomic concentration equal to or greater than 6×10 18 /cm 3 so that resistance of said resistor is stabilized against diffusion of lower concentrations of incidental hydrogen atoms.
Claim 8
Dependent Claim 43 words
A semiconductor device, comprising: a non-doped polysilicon resistor formed on a substrate and having hydrogen atomic concentration equal to or greater than 6×10 18 /cm 3 so that resistance of said resistor is stabilized against diffusion of lower concentrations of incidental hydrogen atoms.
Claim 9
Dependent Claim 62 words
The semiconductor device according to claim 6, further comprising a first interlayer insulator film formed over said resistor layer, said first interlayer insulator film being comprised of a silicon oxide film formed by chemical vapor deposition which applies a high-frequency electric field to thereby provided said hydrogen atomic concentration of equal to or greater than 6×10 18 /cm 3 to said resistor.
Claim 10
Dependent Claim 25 words
The semiconductor device according to claim 7, wherein said chemical vapor deposition for applying said high-frequency electric field is bias ECR (Electron Cyclotron Resonance )--CVD.
Claim 11
Dependent Claim 25 words
The semiconductor device according to claim 8, further comprising a second interlayer insulator film formed between said resistor layer and said first interlayer insulator film.
Claim 12
Dependent Claim 20 words
The semiconductor device according to claim 9, wherein said second interlayer insulator film is comprised of a silicon oxide film.
Claim 13
Dependent Claim 20 words
The semiconductor device according to claim 10, wherein said second interlayer insulator film is further comprised of a BPSG film.
Claim 14
Dependent Claim 16 words
The semiconductor device according to claim 11, wherein said resistor layer is doped with an impurity.
Claim 15
Dependent Claim 145 words
A semiconductor device, comprising: a substrate; a non-doped polysilicon resistor formed on a portion of an upper surface of said substrate; a first silicon oxide film formed on said upper surface of said substrate and over an upper and side surfaces of said resistor; a BPSG film formed on an entire upper surface of said first silicon dioxide film; two metal wiring connections formed on an upper surface of said BPSG film and penetrating said BPSG film and said first silicon dioxide to connect to said resistor at different respective locations; and a second silicon oxide film formed by chemical vapor deposition which applies a high-frequency electric field so that hydrogen atomic concentration of said resistor is increased to be equal to or greater than 6×10 18 /cm 3 , thereby stabilizing resistance of said resistor against diffusion of lower concentrations of incidental hydrogen atoms.
Claim 16
Dependent Claim 145 words
A semiconductor device, comprising: a substrate; a non-doped polysilicon resistor formed on a portion of an upper surface of said substrate; a first silicon oxide film formed on said upper surface of said substrate and over an upper and side surfaces of said resistor; a BPSG film formed on an entire upper surface of said first silicon dioxide film; two metal wiring connections formed on an upper surface of said BPSG film and penetrating said BPSG film and said first silicon dioxide to connect to said resistor at different respective locations; and a second silicon oxide film formed by chemical vapor deposition which applies a high-frequency electric field so that hydrogen atomic concentration of said resistor is increased to be equal to or greater than 6×10 18 /cm 3 , thereby stabilizing resistance of said resistor against diffusion of lower concentrations of incidental hydrogen atoms.
Claim 17
Dependent Claim 16 words
The semiconductor device according to claim 13, wherein said resistor layer is doped with an impurity.

References Cited (Backward Citations)

US4579600A Cited
US4828629A Cited
US4602421A Cited
US5087956A Cited
JPH0516186A Cited
JPH0556661A Cited
JPH0691189A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-05-11 2001-11-10 2002-05-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-05-11 2005-11-10 2006-05-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-05-11 2009-11-10 2010-05-12 $7700.00 Window Closed / Lapsed

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