Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
353 words
Bipolar transistor apparatus comprising the combination of: a semiconductor substrate member; first semiconductor layer means including both a lowermost sub collector layer and an overlaying collector layer disposed proximate an exposed surface of said substrate member and including a collector layer first doped region of first shape configuration for achieving transistor collector element realization; second semiconductor layer means overlaying said first semiconductor layer means and including a second doped region of second shape configuration and alignment with said first semiconductor layer means first shape configuration region for transistor base element realization; third semiconductor layer means overlaying said second semiconductor layer means and including a third doped region of selected shape configuration and alignment with said second semiconductor layer means shape configuration for transistor emitter element realization; said first, second and third semiconductor layer means comprising a first transistor site in said transistor apparatus; fourth layer means of a rigid electrical insulating material overlaying said third semiconductor layer means for electrically and physically isolating third semiconductor layer means surface area-received portions of said transistor site; thermal conductor means extending through said fourth layer means and thermally connecting with said third semiconductor layer means transistor emitter element for conveying thermal energy from said transistor emitter element and semiconductor regions adjacent said emitter element to a fourth layer means surface region-received thermal node portion of said thermal conductor means; thermal shunting means received over said fourth layer means on an exterior surface of said transistor apparatus and connecting with said thermal conductor means thermal node portions and with an additional thermal node portion of a second transistor site in said transistor apparatus for maintaining said transistor element sites at similar operating temperatures; heat spreader means received on said first layer means sub collector layer in substantial cross sectioned area thermal communication with said sub collector layer and said substrate member underlying said sub collector layer and thermally connected with an extremity of said thermal shunting means for conducting thermal energy received via said thermal conductor means and said thermal shunting means from said third semiconductor layer means transistor emitter element into said substrate member for dissipation.
Claim 2
Dependent Claim
353 words
Bipolar transistor apparatus comprising the combination of: a semiconductor substrate member; first semiconductor layer means including both a lowermost sub collector layer and an overlaying collector layer disposed proximate an exposed surface of said substrate member and including a collector layer first doped region of first shape configuration for achieving transistor collector element realization; second semiconductor layer means overlaying said first semiconductor layer means and including a second doped region of second shape configuration and alignment with said first semiconductor layer means first shape configuration region for transistor base element realization; third semiconductor layer means overlaying said second semiconductor layer means and including a third doped region of selected shape configuration and alignment with said second semiconductor layer means shape configuration for transistor emitter element realization; said first, second and third semiconductor layer means comprising a first transistor site in said transistor apparatus; fourth layer means of a rigid electrical insulating material overlaying said third semiconductor layer means for electrically and physically isolating third semiconductor layer means surface area-received portions of said transistor site; thermal conductor means extending through said fourth layer means and thermally connecting with said third semiconductor layer means transistor emitter element for conveying thermal energy from said transistor emitter element and semiconductor regions adjacent said emitter element to a fourth layer means surface region-received thermal node portion of said thermal conductor means; thermal shunting means received over said fourth layer means on an exterior surface of said transistor apparatus and connecting with said thermal conductor means thermal node portions and with an additional thermal node portion of a second transistor site in said transistor apparatus for maintaining said transistor element sites at similar operating temperatures; heat spreader means received on said first layer means sub collector layer in substantial cross sectioned area thermal communication with said sub collector layer and said substrate member underlying said sub collector layer and thermally connected with an extremity of said thermal shunting means for conducting thermal energy received via said thermal conductor means and said thermal shunting means from said third semiconductor layer means transistor emitter element into said substrate member for dissipation.
Claim 3
Dependent Claim
39 words
The transistor apparatus of claim 1 wherein said transistor apparatus comprises a plurality of physically displaced individual junctions of a heterojunction array, said heterojunction array junctions including common electrical connections via a metallic embodiment of said thermal shunting means.
Claim 4
Dependent Claim
29 words
The transistor apparatus of claim 1 wherein said transistor apparatus comprises a single heterojunction bipolar transistor of an interdigitated finger, and multiple emitter sites on each interdigitated finger, configuration.
Claim 5
Dependent Claim
18 words
The transistor apparatus of claim 1 wherein said semiconductor layer means is comprised of gallium arsenide semiconductor material.
Claim 6
Dependent Claim
27 words
The transistor apparatus of claim 1 wherein said first and second semiconductor layer means include predetermined shape configurations and also include collector and base electrical contact areas.
Claim 7
Dependent Claim
36 words
The transistor apparatus of claim 5 wherein said first semiconductor layer means sub collector layer is comprised of doped gallium arsenide semiconductor material and said collector electrical contact area is received on said sub collector layer.
Claim 8
Dependent Claim
26 words
The transistor apparatus of claim 1 wherein said thermal shunting means includes a plated metallic conductor member extending to opposite lateral sides of said transistor apparatus.
Claim 9
Dependent Claim
46 words
The transistor apparatus of claim 7 wherein said thermal shunting means plated metallic conductor includes heat transmission means, of substantial transistor site included surface area thermal communication with said semiconductor substrate member, for conducting heat communicated by said thermal shunting means to said semiconductor substrate member.
Claim 10
Dependent Claim
17 words
The transistor apparatus of claim 1 wherein said fourth layer means comprises a layer of Polyimide material.
Claim 11
Dependent Claim
27 words
The transistor apparatus of claim 1 further including an ion implanted electrical isolation region located at lateral extremities of said first second and third semiconductor layer means.