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US5732223A Expired / Lapsed US ⏱️ 0.0 years remaining

SCSI host adapter with shared command and data buffer

Assignee: Microsemi Storage Solutions Inc
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Filing: 1992-10-20
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Granted: 1998-03-24
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Expires: 2012-10-20
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Abstract

Abstract A small computer system interface (SCSI) controller circuit, connected between a host computer bus and a SCSI bus, includes a storage buffer shared between command and data signals provided by a host computer to a target SCSI peripheral device. The shared buffer includes a bidirectional FIFO which is used for intermediate storage of command blocks between transferred the host and the target device as well as data blocks. In the case of data transfers from the host to the target device, a command block is written to the bidirectional FIFO followed by as much of the data block as will fit in the remaining FIFO space. After the target device has read the command block, it accesses the SCSI bus and begins the transfer of data from the FIFO. In the case of data transfers from the target device to the host, a data transfer command block is first written to the FIFO by the host. The command block is read by the target device which then provides the requested data to the FIFO over the SCSI bus. The host system receives the requested data from the same shared storage buffer to which the command block was written.

Inventors

  • 👤 Richard S. Moore
  • 👤 David J. O'Shea

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 22:51
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/38; G06F5/00; G06F5/06; G06F5/10; G06F5/12; G06F13/10; G06F13/12; G06F13/124; G06F13/126; G06F13/40; G06F13/4063; G06F2205/00; G06F2205/12; G06F2205/126

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 304 words
A computer system interface controller for interconnecting a host computer bus of a host computer to a peripheral device on a SCSI bus, wherein information is transferred between said host computer and said peripheral device during command phases and data phases, the computer system interface controller comprising: an internal data bus coupled between said host computer bus and said SCSI bus; a set of host data bus buffers connected between said internal data bus and said host computer bus wherein said set of host data bus buffers transfer command bytes for SCSI command phases and data bytes for SCSI data phases between said internal data bus and said host computer bus; a SCSI data port coupled between said internal data bus and said SCSI bus wherein said SCSI data port transfers over a common path data bytes for SCSI data phases and command bytes for SCSI command phases between said internal data bus and said SCSI bus; a shared buffer coupled between said internal data bus and said SCSI data port wherein the shared buffer receives a command byte provided by said host computer during a SCSI command phase and a data byte, for a SCSI data phase, provided by said host computer during said command phase; a flow control logic circuit connected to said shared buffer, said SCSI data port, and coupled to said host computer bus wherein said flow control logic circuit provides directional flow control signals to said shared buffer, said SCSI data port, and said host computer bus; and a data counter connected between said flow control logic circuit and said internal data bus wherein said data counter counts the number of bytes of information provided to said shared buffer and generates a command to said flow control logic circuit to provide said directional flow control signals in response thereto.
Claim 2
Dependent Claim 304 words
A computer system interface controller for interconnecting a host computer bus of a host computer to a peripheral device on a SCSI bus, wherein information is transferred between said host computer and said peripheral device during command phases and data phases, the computer system interface controller comprising: an internal data bus coupled between said host computer bus and said SCSI bus; a set of host data bus buffers connected between said internal data bus and said host computer bus wherein said set of host data bus buffers transfer command bytes for SCSI command phases and data bytes for SCSI data phases between said internal data bus and said host computer bus; a SCSI data port coupled between said internal data bus and said SCSI bus wherein said SCSI data port transfers over a common path data bytes for SCSI data phases and command bytes for SCSI command phases between said internal data bus and said SCSI bus; a shared buffer coupled between said internal data bus and said SCSI data port wherein the shared buffer receives a command byte provided by said host computer during a SCSI command phase and a data byte, for a SCSI data phase, provided by said host computer during said command phase; a flow control logic circuit connected to said shared buffer, said SCSI data port, and coupled to said host computer bus wherein said flow control logic circuit provides directional flow control signals to said shared buffer, said SCSI data port, and said host computer bus; and a data counter connected between said flow control logic circuit and said internal data bus wherein said data counter counts the number of bytes of information provided to said shared buffer and generates a command to said flow control logic circuit to provide said directional flow control signals in response thereto.
Claim 3
Dependent Claim 58 words
The computer system interface controller according to claim 1, wherein said data counter monitors the number of bytes contained within said shared buffer and provides a numeric value indicative of the number of said bytes to the host computer, the host computer providing additional command or data bytes to said shared buffer in response to said numeric value.
Claim 4
Dependent Claim 16 words
The computer system interface controller according to claim 1, wherein said shared buffer is a FIFO.
Claim 5
Dependent Claim 34 words
A computer system interface controller according to claim 1, wherein the command byte comprises a byte in a command block, the command block being written to the shared buffer during said SCSI command phase.
Claim 6
Dependent Claim 66 words
A computer system interface controller according to claim 4, wherein the data byte comprises a data byte in a first data block portion and a second data block portion, the first data block portion, for said SCSI data phase, being written to the shared buffer during the command phase, the second data block portion being provided to said internal data bus during said SCSI data phase.
Claim 7
Dependent Claim 27 words
A computer system interface controller as in claim 1 further comprising: a SCSI control logic circuit connected between said SCSI bus and said flow control logic circuit.
Claim 8
Dependent Claim 28 words
A computer system interface controller as in claim 1 further comprising: a host computer bus interrupt logic circuit connected between said host computer bus and said data counter.
Claim 9
Dependent Claim 28 words
A computer system interface controller as in claim 7 further comprising: a host computer bus control logic circuit connected between said host computer bus and said data counter.
Claim 10
Dependent Claim 28 words
A computer system interface controller as in claim 1 further comprising: a host computer bus control logic circuit connected between said host computer bus and said data counter.
Claim 11
Dependent Claim 290 words
A computer system interface controller for interconnecting a host computer bus of a host computer to a peripheral device on a SCSI bus, wherein information is transferred between said host computer and said peripheral device during command phases and data phases, the computer system interface controller comprising: an internal data bus; a host data bus buffer connected between said internal data bus and said host computer bus wherein said host data bus buffer transfers command bytes for SCSI command phases and data bytes for SCSI data phases between said internal data bus and said host computer bus; a SCSI data port connected to said SCSI bus, and directly connected to said internal data bus wherein said SCSI data port transfers over a common path data bytes for SCSI data phases and command bytes for SCSI command phases to and from said SCSI bus; a shared buffer connected to said internal data bus and to said SCSI data port wherein the shared buffer receives a command byte provided by said host computer during a SCSI command phase and a data byte for a SCSI data phase provided by said host computer during said command phase; a flow control logic circuit connected to said shared buffer, said SCSI data port, and coupled to said host computer bus wherein said flow control logic provides directional flow control signals to said shared buffer, said SCSI data port, and said host computer bus; and a data counter connected between said flow control logic circuit and said internal data bus wherein said data counter counts the number of bytes of information provided to said shared buffer and generates a command to said flow control logic circuit to provide said directional flow control signals in response thereto.
Claim 12
Dependent Claim 290 words
A computer system interface controller for interconnecting a host computer bus of a host computer to a peripheral device on a SCSI bus, wherein information is transferred between said host computer and said peripheral device during command phases and data phases, the computer system interface controller comprising: an internal data bus; a host data bus buffer connected between said internal data bus and said host computer bus wherein said host data bus buffer transfers command bytes for SCSI command phases and data bytes for SCSI data phases between said internal data bus and said host computer bus; a SCSI data port connected to said SCSI bus, and directly connected to said internal data bus wherein said SCSI data port transfers over a common path data bytes for SCSI data phases and command bytes for SCSI command phases to and from said SCSI bus; a shared buffer connected to said internal data bus and to said SCSI data port wherein the shared buffer receives a command byte provided by said host computer during a SCSI command phase and a data byte for a SCSI data phase provided by said host computer during said command phase; a flow control logic circuit connected to said shared buffer, said SCSI data port, and coupled to said host computer bus wherein said flow control logic provides directional flow control signals to said shared buffer, said SCSI data port, and said host computer bus; and a data counter connected between said flow control logic circuit and said internal data bus wherein said data counter counts the number of bytes of information provided to said shared buffer and generates a command to said flow control logic circuit to provide said directional flow control signals in response thereto.
Claim 13
Dependent Claim 27 words
A computer system interface controller as in claim 10 further comprising: a SCSI control logic circuit connected between said SCSI bus and said flow control logic circuit.
Claim 14
Dependent Claim 28 words
A computer system interface controller as in claim 10 further comprising: a host computer bus interrupt logic circuit connected between said host computer bus and said data counter.
Claim 15
Dependent Claim 28 words
A computer system interface controller as in claim 10 further comprising: a host computer bus control logic circuit connected between said host computer bus and said data counter.
Claim 16
Dependent Claim 337 words
A computer system interface controller for interconnecting a host computer bus of a host computer to a peripheral device on a SCSI bus, wherein information is transferred between said host computer and said peripheral device during command phases and data phases, the computer system interface controller comprising: an internal data bus; a host data bus buffer connected between said internal data bus and said host computer bus wherein said host data bus buffer transfers command bytes for SCSI command phases and data bytes for SCSI data phases between said internal data bus and said host computer bus; a SCSI data port coupled between said internal data bus and said SCSI bus wherein said SCSI data port transfers over a common path data bytes for SCSI data phases and command bytes for SCSI command phases to and from said SCSI bus; a shared buffer connected to said internal data bus and to said SCSI data port wherein the shared buffer receives a command byte provided by said host computer during a SCSI command phase and a data byte for a SCSI data phase provided by said host computer during said command phase; a flow control logic circuit connected to said shared buffer, said SCSI data port, and coupled to said host computer bus wherein said flow control logic provides directional flow control signals to said shared buffer, said SCSI data port, and said host computer bus; a SCSI control logic circuit connected between said SCSI bus and said flow control logic circuit; a data counter connected between said flow control logic circuit and said internal data bus wherein said data counter counts the number of bytes of information provided to said shared buffer and generates a command to said flow control logic circuit to provide said directional flow control signals in response thereto; a host computer bus interrupt logic circuit connected between said host computer bus and said data counter; and a host computer bus control logic circuit connected between said host computer bus and said data counter.
Claim 17
Dependent Claim 337 words
A computer system interface controller for interconnecting a host computer bus of a host computer to a peripheral device on a SCSI bus, wherein information is transferred between said host computer and said peripheral device during command phases and data phases, the computer system interface controller comprising: an internal data bus; a host data bus buffer connected between said internal data bus and said host computer bus wherein said host data bus buffer transfers command bytes for SCSI command phases and data bytes for SCSI data phases between said internal data bus and said host computer bus; a SCSI data port coupled between said internal data bus and said SCSI bus wherein said SCSI data port transfers over a common path data bytes for SCSI data phases and command bytes for SCSI command phases to and from said SCSI bus; a shared buffer connected to said internal data bus and to said SCSI data port wherein the shared buffer receives a command byte provided by said host computer during a SCSI command phase and a data byte for a SCSI data phase provided by said host computer during said command phase; a flow control logic circuit connected to said shared buffer, said SCSI data port, and coupled to said host computer bus wherein said flow control logic provides directional flow control signals to said shared buffer, said SCSI data port, and said host computer bus; a SCSI control logic circuit connected between said SCSI bus and said flow control logic circuit; a data counter connected between said flow control logic circuit and said internal data bus wherein said data counter counts the number of bytes of information provided to said shared buffer and generates a command to said flow control logic circuit to provide said directional flow control signals in response thereto; a host computer bus interrupt logic circuit connected between said host computer bus and said data counter; and a host computer bus control logic circuit connected between said host computer bus and said data counter.
Claim 18
Dependent Claim 22 words
A computer system interface controller as in claim 14 wherein said SCSI data port is connected directly to said internal data bus.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-03-23 2001-09-22 2002-03-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-03-23 2005-09-22 2006-03-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-03-23 2009-09-22 2010-03-24 $7700.00 Window Closed / Lapsed

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