Patent US5719449A successfully refreshed from Google Patents.
US5719449A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Flip-chip integrated circuit with improved testability
Assignee: Bell Semiconductor LLC
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Filing: 1996-09-30
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Granted: 1998-02-17
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Expires: 2016-09-30
Abstract
Abstract An integrated circuit is adapted for implementing flip-chip technology with solder bumps, while providing for improved testability. The integrated circuit comprises two sets of pads formed in the same metal layer, with a first set being used for wafer probing, and a second set for solder bumps. The wafer probe pads are placed in one row along each chip edge. A second set of pads, the solder bump pads, are arranged in rows towards the center of the chip with respect to the wafer probe pads. Metal interconnects formed in the same metal layer as the pads connects each solder bump pad to a corresponding wafer probe pad. Testing of the integrated circuit may be accomplished using the wafer probe pads according to conventional techniques, while mounting of the chip may be accomplished with the solder bump pads using the flip-chip technology.
Inventors
- 👤 Mark Steven Strauss
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 12:49
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/20; H10P; H10P74/00; H10P74/27; H10P74/273; H10W72/01; H10W72/019; H10W72/251; H10W72/29; H10W72/90; H10W72/921; H10W72/923; H10W72/951; H10W72/952; H10W72/981; H10W72/983
Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
111 words
An integrated circuit comprising devices formed in a semiconductor substrate, and a first set of metal pads formed in a given metal layer overlying said substrate and adapted to provide solder bump connections to external circuitry, characterized in that said integrated circuit further comprises a second set of metal pads also formed in said given metal layer and adapted to being contacted by test probes; and wherein pads in said first set are connected to corresponding pads in said second set by means of conductors; and wherein the pads in said second set contact devices formed in said semiconductor substrate through openings in at least one dielectric layer overlying said substrate.
Claim 2
Dependent Claim
111 words
An integrated circuit comprising devices formed in a semiconductor substrate, and a first set of metal pads formed in a given metal layer overlying said substrate and adapted to provide solder bump connections to external circuitry, characterized in that said integrated circuit further comprises a second set of metal pads also formed in said given metal layer and adapted to being contacted by test probes; and wherein pads in said first set are connected to corresponding pads in said second set by means of conductors; and wherein the pads in said second set contact devices formed in said semiconductor substrate through openings in at least one dielectric layer overlying said substrate.
Claim 3
Dependent Claim
16 words
The invention of claim 1 wherein said conductors are also formed in said given metal layer.
Claim 4
Dependent Claim
31 words
The invention of claim 1 wherein the pads in said first set are located interior to the pads of said second set with respect to the boundaries of said integrated circuit.
Claim 5
Dependent Claim
21 words
The invention of claim 1 wherein the pads in said second set are located along the edges of said integrated circuit.
Claim 6
Dependent Claim
21 words
The invention of claim 1 wherein some of said pads are adapted to provide power supply voltages to said integrated circuit.
Claim 7
Dependent Claim
20 words
The invention of claim 1 wherein some of said pads are connected to signal input circuitry on said integrated circuit.
Claim 8
Dependent Claim
20 words
The invention of claim 1 wherein some of said pads are connected to signal output circuitry on said integrated circuit.
Claim 9
Dependent Claim
208 words
An integrated circuit comprising devices formed in a semiconductor substrate, and a first set of metal pads formed in a given metal layer overlying said substrate, with said pads being adapted to provide solder bump connections to external circuitry, characterized in that said integrated circuit further comprises a second set of metal pads also formed in said given metal layer and adapted to being contacted by test probes; and wherein pads in said first set are connected to corresponding pads in said second set by means of conductors formed in said given metal layer; and wherein the pads in said second set contact devices formed in said semiconductor substrate through openings in at least one dielectric layer overlying said substrate; wherein the pads in said first set are located interior to the pads of said second set with respect to the boundaries of said integrated circuit, and wherein the pads in said second set are located along the edges of said integrated circuit; wherein some of said pads are adapted to provide power supply voltages to said integrated circuit, some of said pads are connected to signal input circuitry on said integrated circuit, and some of said pads are connected to signal output circuitry on said integrated circuit.
Claim 10
Dependent Claim
208 words
An integrated circuit comprising devices formed in a semiconductor substrate, and a first set of metal pads formed in a given metal layer overlying said substrate, with said pads being adapted to provide solder bump connections to external circuitry, characterized in that said integrated circuit further comprises a second set of metal pads also formed in said given metal layer and adapted to being contacted by test probes; and wherein pads in said first set are connected to corresponding pads in said second set by means of conductors formed in said given metal layer; and wherein the pads in said second set contact devices formed in said semiconductor substrate through openings in at least one dielectric layer overlying said substrate; wherein the pads in said first set are located interior to the pads of said second set with respect to the boundaries of said integrated circuit, and wherein the pads in said second set are located along the edges of said integrated circuit; wherein some of said pads are adapted to provide power supply voltages to said integrated circuit, some of said pads are connected to signal input circuitry on said integrated circuit, and some of said pads are connected to signal output circuitry on said integrated circuit.
Claim 11
Independent Claim
123 words
A method of testing an integrated circuit having devices formed in a semiconductor substrate by steps comprising applying test probes to a first set of metal pads formed in a given metal layer and located around the periphery of the integrated circuit, characterized in that said integrated circuit comprises a second set of metal pads formed in said given metal layer overlying said substrate, with said pads being adapted to provide solder bump connections to external circuitry, and wherein pads in said first set are connected to corresponding pads in said second set by means of conductors; and wherein the pads in said first set contact devices formed in said semiconductor substrate through openings in at least one dielectric layer overlying said substrate.
Claim 12
Independent Claim
123 words
A method of testing an integrated circuit having devices formed in a semiconductor substrate by steps comprising applying test probes to a first set of metal pads formed in a given metal layer and located around the periphery of the integrated circuit, characterized in that said integrated circuit comprises a second set of metal pads formed in said given metal layer overlying said substrate, with said pads being adapted to provide solder bump connections to external circuitry, and wherein pads in said first set are connected to corresponding pads in said second set by means of conductors; and wherein the pads in said first set contact devices formed in said semiconductor substrate through openings in at least one dielectric layer overlying said substrate.
Claim 13
Dependent Claim
16 words
The invention of claim 9 wherein said conductors are also formed in said given metal layer.
Claim 14
Dependent Claim
31 words
The invention of claim 9 wherein the pads in said second set are located interior to the pads of said first set with respect to the boundaries of said integrated circuit.
Claim 15
Dependent Claim
21 words
The invention of claim 9 wherein the pads in said first set are located along the edges of said integrated circuit.
Claim 16
Dependent Claim
21 words
The invention of claim 9 wherein some of said pads are adapted to provide power supply voltages to said integrated circuit.
Claim 17
Dependent Claim
20 words
The invention of claim 9 wherein some of said pads are connected to signal input circuitry on said integrated circuit.
Claim 18
Dependent Claim
20 words
The invention of claim 9 wherein some of said pads are connected to signal output circuitry on said integrated circuit.
Claim 19
Independent Claim
112 words
A method of mounting an integrated circuit having devices formed in a semiconductor substrate by steps comprising applying solder bumps to a first set of metal pads formed in a given metal layer, characterized in that said integrated circuit comprises a second set of metal pads formed in said given metal layer overlying said substrate with said pads, being adapted to being contacted by test probes, and wherein pads in said first set are connected to corresponding pads in said second set by means of conductors; and wherein the pads in said second set contact devices formed in said semiconductor substrate through openings in at least one dielectric layer overlying said substrate.
Claim 20
Independent Claim
112 words
A method of mounting an integrated circuit having devices formed in a semiconductor substrate by steps comprising applying solder bumps to a first set of metal pads formed in a given metal layer, characterized in that said integrated circuit comprises a second set of metal pads formed in said given metal layer overlying said substrate with said pads, being adapted to being contacted by test probes, and wherein pads in said first set are connected to corresponding pads in said second set by means of conductors; and wherein the pads in said second set contact devices formed in said semiconductor substrate through openings in at least one dielectric layer overlying said substrate.
Claim 21
Dependent Claim
16 words
The invention of claim 16 wherein said conductors are also formed in said given metal layer.
Claim 22
Dependent Claim
31 words
The invention of claim 16 wherein the pads in said first set are located interior to the pads of said second set with respect to the boundaries of said integrated circuit.
Claim 23
Dependent Claim
21 words
The invention of claim 16 wherein the pads in said second set are located along the edges of said integrated circuit.
Claim 24
Dependent Claim
21 words
The invention of claim 16 wherein some of said pads are adapted to provide power supply voltages to said integrated circuit.
Claim 25
Dependent Claim
20 words
The invention of claim 16 wherein some of said pads are connected to signal input circuitry on said integrated circuit.
Claim 26
Dependent Claim
20 words
The invention of claim 16 wherein some of said pads are connected to signal output circuitry on said integrated circuit.
Claim 27
Dependent Claim
19 words
The invention of claim 16 further comprising the step of flip-chip bonding said integrated circuit to a mounting substrate.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-02-16 | 2001-08-18 | 2002-02-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-02-16 | 2005-08-18 | 2006-02-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-02-16 | 2009-08-18 | 2010-02-17 | $7700.00 | Window Closed / Lapsed |