Process for fabricating read-only memory cells using removable barrier strips

Abstract

Abstract A process for fabricating memory cells of a read-only memory (ROM) device is disclosed. First, a silicon dioxide layer and a silicon nitride layer are successively formed on the surface of a silicon substrate. These layers are patterned by etching to form a plurality of parallel barrier strips extending along a first direction on the surface of the substrate. Impurities are then implanted into the silicon substrate by using the barrier strips as masks, to form a plurality of buried bit lines in the areas between the barrier strips. Next, insulating sidewall spacers are formed on the sidewalls of the barrier strips. A metal silicide layer is then formed over the exposed surface of the buried bit lines in a self-aligned process. A thick dielectric layer is then formed overlying the barrier strips, the insulating sidewall spacers, and the metal silicide layer. The upper portions of the thick dielectric layer, the insulating sidewall spacers, and the silicon nitride layer are then polished to form a planar surface. Thereafter, portions of the barrier strips that cover the designated coding regions of the memory cells are removed to expose the silicon substrate. A gate oxide layer is formed on the exposed surface of the silicon substrate. Finally, a conducting layer is formed overlying the entire substrate surface. The conducting layer is then patterned by etching to form a plurality of strip-shaped word lines of the memory cells extending along a second direction which is substantially orthogonal to the first direction.

Inventors

• 👤 Chen-Chung Hsu

Bibliographic Details