Process for producing high density conductive lines

Claim 1

A method of forming a plurality of self-aligned closely spaced conductive lines on a semiconductor substrate comprising the steps of: providing a first thin insulating layer on the surface the semiconductor substrate, forming a blanket conductive layer over the first insulating layer, depositing a first blanket masking layer over the blanket conductive layer, depositing a photoresist layer over the masking layer, exposing and developing the photoresist layer to define an elongated spaced parallel line pattern which exposes areas of the first masking layer between the line pattern, anisotrophically etching the exposed areas of said first masking layer through the photoresist pattern to form masking lines having vertical sidewalls and exposing areas of the conductive layer between the line patterns, removing the photoresist pattern, thermally oxidizing the exposed areas of the conductive layer between the masking lines forming a second thin insulating layer, depositing a conformal layer of polycrystalline silicon material over said masking lines and the thermal oxide, anisotrophically etching the conformal layer of polycrystalline silicon to form spacers on the vertical sidewalls of the said masking lines, depositing a second masking layer having a planar top surface over the masking lines to thickness greater than the thickness of the masking lines. planarized etching the second masking layer to expose the top surfaces of the masking lines and spacers. anisotropically etching said polycrystalline silicon spacers and etching through the underlying second insulating layer and the underlying conductive layer thereby forming closely spaced conductive lines, removing the masking lines of the first masking layer and said second masking layer, forming an insulating layer over said conductive lines of the conductive layer.

Claim 2

A method of forming a plurality of self-aligned closely spaced conductive lines on a semiconductor substrate comprising the steps of: providing a first thin insulating layer on the surface the semiconductor substrate, forming a blanket conductive layer over the first insulating layer, depositing a first blanket masking layer over the blanket conductive layer, depositing a photoresist layer over the masking layer, exposing and developing the photoresist layer to define an elongated spaced parallel line pattern which exposes areas of the first masking layer between the line pattern, anisotrophically etching the exposed areas of said first masking layer through the photoresist pattern to form masking lines having vertical sidewalls and exposing areas of the conductive layer between the line patterns, removing the photoresist pattern, thermally oxidizing the exposed areas of the conductive layer between the masking lines forming a second thin insulating layer, depositing a conformal layer of polycrystalline silicon material over said masking lines and the thermal oxide, anisotrophically etching the conformal layer of polycrystalline silicon to form spacers on the vertical sidewalls of the said masking lines, depositing a second masking layer having a planar top surface over the masking lines to thickness greater than the thickness of the masking lines. planarized etching the second masking layer to expose the top surfaces of the masking lines and spacers. anisotropically etching said polycrystalline silicon spacers and etching through the underlying second insulating layer and the underlying conductive layer thereby forming closely spaced conductive lines, removing the masking lines of the first masking layer and said second masking layer, forming an insulating layer over said conductive lines of the conductive layer.