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US5708284A Expired / Lapsed US ⏱️ 0.0 years remaining

Non-volatile random access memory

Assignee: Sharp Corp
•
Filing: 1996-03-14
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Granted: 1998-01-13
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Expires: 2016-03-14
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Abstract

Abstract A non-volatile random access memory comprises a memory cell including: a MOS transistor having a gate insulation film formed on a semiconductor substrate, a gate electrode, and a pair of impurity diffusion layers; and an MFS transistor having at least a bottom gate electrode, a ferroelectric film, a top electrode, and a pair of impurity diffusion layers, one of the impurity diffusion layers of the MFS transistor being shared with the MOS transistor and connected to a portion of the bottom gate electrode; wherein the MOS transistor is connected to a bit line and a word line, and the MFS transistor is connected to a drive line and a common source line.

Inventors

  • 👤 Shigeo Onishi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 09:09
CPC Classifications
H; H10; H10B; H10B53/00; H10B53/30; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/682; G; G11; G11C; G11C11/00; G11C11/21; G11C11/22; G11C11/223

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 156 words
A non-volatile random access memory which comprises a memory cell including: a MOS transistor having a gate insulation film formed on a semiconductor substrate, a gate electrode, and a pair of impurity diffusion regions; and an MFS transistor having at least a gate insulation film, a bottom gate electrode, a ferroelectric film, a top electrode, and a pair of impurity diffusion regions, the gate insulation film being formed immediately under a portion of the bottom electrode and between the pair of impurity diffusion regions, and one of the impurity diffusion regions of the MFS transistor being shared with the MOS transistor and connected to a portion of the bottom gate electrode so as to apply a voltage to the bottom gate electrode via the impurity diffusion region; wherein the MOS transistor is connected to a bit line and a word line, and the MFS transistor is connected to a drive line and a common source line.
Claim 2
Dependent Claim 156 words
A non-volatile random access memory which comprises a memory cell including: a MOS transistor having a gate insulation film formed on a semiconductor substrate, a gate electrode, and a pair of impurity diffusion regions; and an MFS transistor having at least a gate insulation film, a bottom gate electrode, a ferroelectric film, a top electrode, and a pair of impurity diffusion regions, the gate insulation film being formed immediately under a portion of the bottom electrode and between the pair of impurity diffusion regions, and one of the impurity diffusion regions of the MFS transistor being shared with the MOS transistor and connected to a portion of the bottom gate electrode so as to apply a voltage to the bottom gate electrode via the impurity diffusion region; wherein the MOS transistor is connected to a bit line and a word line, and the MFS transistor is connected to a drive line and a common source line.
Claim 3
Dependent Claim 28 words
A non-volatile random access memory of claim 1, wherein the bottom gate electrode of the MFS transistor is made of Pt/TiN/Ti, RuO 2 /Ru or IrO 2 /Ir.
Claim 4
Dependent Claim 38 words
A non-volatile random access memory of claim 1, wherein the ferroelectric film of the MFS transistor is made of PZT, PLZT, PNZT, BiSr 2 Ta 2 O 9 or BiSr 2 Ta x N y O 9 .
Claim 5
Dependent Claim 32 words
A non-volatile random access memory of claim 1, wherein the bottom gate electrode of the MFS is formed to extend over and form the connection with said one of the diffusion regions.
Claim 6
Dependent Claim 117 words
A non-volatile random access memory which comprises a memory cell including: a MOS transistor portion having a gate insulation film and a bottom gate electrode formed on the semiconductor substrate, and a pair of impurity diffusion regions, said gate insulation film being formed immediately under a portion of the bottom gate electrode and between the pair of impurity diffusion regions; a ferroelectric capacitor portion, formed on the MOS transistor portion, having the bottom gate electrode serving as a bottom electrode, a ferroelectric film and a top electrode, wherein the bottom gate electrode is connected to one of the impurity diffusion regions so as to apply a voltage to the bottom gate electrode via the impurity diffusion regions.
Claim 7
Dependent Claim 117 words
A non-volatile random access memory which comprises a memory cell including: a MOS transistor portion having a gate insulation film and a bottom gate electrode formed on the semiconductor substrate, and a pair of impurity diffusion regions, said gate insulation film being formed immediately under a portion of the bottom gate electrode and between the pair of impurity diffusion regions; a ferroelectric capacitor portion, formed on the MOS transistor portion, having the bottom gate electrode serving as a bottom electrode, a ferroelectric film and a top electrode, wherein the bottom gate electrode is connected to one of the impurity diffusion regions so as to apply a voltage to the bottom gate electrode via the impurity diffusion regions.
Claim 8
Dependent Claim 23 words
A non-volatile random access memory of claim 5, wherein the bottom electrode is made of Pt/TiN/Ti, RuO 2 /Ru or IrO 2 /Ir.
Claim 9
Dependent Claim 34 words
A non-volatile random access memory of claim 5, wherein the ferroelectric film is made of PZT, PLZT, PNZT, BiSr 2 Ta 2 O 9 or BiSr 2 Ta x N y O 9 .
Claim 10
Dependent Claim 32 words
A non-volatile random access memory of claim 5, wherein the bottom gate electrode of the MFS is formed to extend over and form the connection with said one of the diffusion regions.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-01-12 2001-07-14 2002-01-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-01-12 2005-07-14 2006-01-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-01-12 2009-07-14 2010-01-13 $7700.00 Window Closed / Lapsed

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