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US5699231A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of packaging high voltage components with low voltage components in a small space

Assignee: Xerox Corp
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Filing: 1995-11-24
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Granted: 1997-12-16
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Expires: 2015-11-24
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Abstract

Abstract An electronic circuit package in which several high voltage components are packaged along with low voltage components using standard circuit boards and minimizing the space needed for the entire assembly. A miniature circuit board, constructed of standard circuit board material, is used to mount several electronic components, some of which require high voltages. To meet isolation requirements, requiring a dielectric strength more than that provided by the board itself, between the high and low voltage nodes the circuit board incorporates slots or other cut out shapes in the board. The slots or other cut out shapes provide two functions. The first use for the slots or other cut out shapes is to prevent charge migration on the surface of the board between high and low voltage nodes. This is accomplished by placing the slots or other cut out shapes between high and low voltage nodes. The circuit board is then encapsulated within a potting material. The slots or other cut out shapes perform a second function of allowing the potting material to flow around and through the board to facilitate full encapsulation of the board and the electronic devices on the board. Several of the slots or other cut out shapes are placed in the board directly underneath the electronic devices mounted on the board to aid in allowing the potting material to completely surround and encapsulate the electronic devices.

Inventors

  • 👤 Abdul M. ElHatem
  • 👤 Mohammad M. Mojarradi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 22:23
CPC Classifications
H; H05; H05K; H05K5/00; H05K5/06; H05K5/064; H05K1/00; H05K1/02; H05K1/0213; H05K1/0254; H05K1/0256; H05K1/0262; H05K3/00; H05K3/22; H05K3/28; H05K3/284; H05K2201/00; H05K2201/09; H05K2201/09009; H05K2201/09063; H05K2201/09072; H05K2201/10; H05K2201/10613; H05K2201/10621; H05K2201/10689

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 222 words
An electronic circuit package comprising a) a circuit board having a top surface, b) at least one high voltage component attached to said circuit board and spaced from said circuit board top surface, c) at least one low voltage component attached to said circuit board and spaced from said circuit board top surface, said circuit board having at least one opening beneath said at least one high voltage component, having at least one opening beneath said at least one low voltage component, and having at least one opening between said at least one high voltage component and said at least one low voltage component to prevent charge migration, and d) a housing, said circuit board being located within said housing, potting material within said housing completely surrounding said circuit board, said at least one high voltage component and said at least one low voltage component and said potting material further extending through each of said openings and completely between said top surface of said circuit board and said at least one high voltage component and completely between said top surface of said circuit board and said at least one low voltage component whereby each component is encapsulated by said potting material and each at least one high voltage component and at least one low voltage component are electrically isolated from each other.
Claim 2
Dependent Claim 222 words
An electronic circuit package comprising a) a circuit board having a top surface, b) at least one high voltage component attached to said circuit board and spaced from said circuit board top surface, c) at least one low voltage component attached to said circuit board and spaced from said circuit board top surface, said circuit board having at least one opening beneath said at least one high voltage component, having at least one opening beneath said at least one low voltage component, and having at least one opening between said at least one high voltage component and said at least one low voltage component to prevent charge migration, and d) a housing, said circuit board being located within said housing, potting material within said housing completely surrounding said circuit board, said at least one high voltage component and said at least one low voltage component and said potting material further extending through each of said openings and completely between said top surface of said circuit board and said at least one high voltage component and completely between said top surface of said circuit board and said at least one low voltage component whereby each component is encapsulated by said potting material and each at least one high voltage component and at least one low voltage component are electrically isolated from each other.

References Cited (Backward Citations)

US3753046A Cited
JPH04129255A Cited
US5394301A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-12-15 2001-06-16 2001-12-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-12-15 2005-06-16 2005-12-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-12-15 2009-06-16 2009-12-16 $7700.00 Window Closed / Lapsed

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