MOS field effect transistor and method for manufacturing the same

Claim 2

An MOS field effect transistor, comprising: a semiconductor substrate of a first conductivity type; a source region and a drain region, both of a second conductivity type, which are formed inside the substrate and are isolated from each other by a predetermined distance; a first insulation layer formed in the substrate and located between the source region and the drain region; a gate electrode conductive layer formed on the first insulation layer; a pair of second insulation layers formed on opposing side walls of the gate electrode conductive layer, respectively, and having a dielectric constant greater than 7.5; and a third insulation layer formed of silicon oxide between the second insulation layers and the source and drain regions, said third insulation layer having a thickness of 90 Å which is greater than the length of a mean free path of hot carriers generated in the vicinity of the drain region.

Claim 3

An MOS field effect transistor, comprising: a semiconductor substrate of a first conductivity type; a source region and a drain region, both of a second conductivity type, which are formed inside the substrate and are isolated from each other by a predetermined distance; a first insulation layer formed on the substrate and located between the source region and the drain region; a gate electrode conductive layer formed on the first insulation layer; a pair of second insulation layers formed on opposing side walls of the gate electrode conductive layer, respectively, and having a dielectric constant greater than 7.5; and a third insulation layer which is formed between the second insulation layers and the source and drain regions, has a thickness of 90 Å greater than the length of the mean free path of hot carriers generated in the vicinity of the drain region, and has a larger amount of band gap energy than the second insulation layers.

Claim 4

An MOS field effect transistor, comprising: a semiconductor substrate of a first conductivity type; a source region and a drain region, both of a second conductivity type, which are formed inside the substrate and are isolated from each other by a predetermined distance; a first insulation layer formed on the substrate and located between the source region and the drain region; a gate electrode conductive layer formed on the first insulation layer; a pair of second insulation layers formed on opposing side walls of the gate electrode conductive layer, respectively, and having a dielectric constant greater than 7.5; and a third insulation layer which is formed between the second insulation layers and the source and drain regions, has a thickness of 90 Å greater than the length of the mean free path of hot carriers generated in the vicinity of the drain region, and has a larger amount of band gap energy than the second insulation layers.

Claim 5

An MOS field effect transistor, comprising: a semiconductor substrate of a first conductivity type; a source region and a drain region, both of a second conductivity type, which are formed inside the substrate and are isolated from each other by a predetermined distance; a first insulation layer formed on the substrate and located between the source region and the drain region; a gate electrode conductive layer formed on the first insulation layer; a pair of second insulation layers formed on opposing side walls of the gate electrode conductive layer, respectively, and having a dielectric constant greater than 7.5; and a third insulation layer formed between the second insulation layers and the source and drain regions, said third insulation layer having a thickness less than 90 Å which is greater than the length of a mean free path of hot carriers generated in the vicinity of the drain region.

Claim 6

An MOS field effect transistor, comprising: a semiconductor substrate of a first conductivity type; a source region and a drain region, both of a second conductivity type, which are formed inside the substrate and are isolated from each other by a predetermined distance; a first insulation layer formed on the substrate and located between the source region and the drain region; a gate electrode conductive layer formed on the first insulation layer; a pair of second insulation layers formed on opposing side walls of the gate electrode conductive layer, respectively, and having a dielectric constant greater than 7.5; and a third insulation layer formed between the second insulation layers and the source and drain regions, said third insulation layer having a thickness less than 90 Å which is greater than the length of a mean free path of hot carriers generated in the vicinity of the drain region.