EP0329047A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
MIS device with auxiliary gate
Assignee: Hitachi Ltd
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Filing: 1989-02-13
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Granted: —
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Expires: 2009-02-13
Abstract
Abstract In a MOSFET of an LDD structure, a side wall (51) is made conductive and connected to a gate (3) through a resistance (13) thereby to cause hot carriers taken into the side wall (51) to be discharged to a gate (3) through the resistance (13), whereby a channel resistance is prevented from being increased by an effect of carriers accumulated in the side wall (51). As a result, a reliable MOSFET with a short channel can be provided which is not degraded even if it is used for a long time.
Inventors
- 👤 Masataka Minami
- 👤 Youkou Wakui
- 👤 Takahiro Nagano
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-03 00:45
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/671; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/60; H10D30/601; H10D30/605; H10D30/611; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01326; H10D64/0133; H10D64/021; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/517; H10D64/518; H10D64/605; H10D64/675; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
107 words
A semiconductor device having two other conductive type impurity regions formed in one conductive type semiconductor region and a gate electrode formed through a passivation film formed to cover at least the region between said two other conductive type impurity regions on the main surface of said one conductive type semiconductor region, characterized in that said two other conductive type impurity regions (6, 4) have a low impurity concentration in the vicinity (4) of said gate electrode (3), a conductive member (51) is provided to cover said low impurity concentration region (4), and said conductive member (51) is connected to said gate electrode (3) through a resistance.
Claim 2
Dependent Claim
107 words
A semiconductor device having two other conductive type impurity regions formed in one conductive type semiconductor region and a gate electrode formed through a passivation film formed to cover at least the region between said two other conductive type impurity regions on the main surface of said one conductive type semiconductor region, characterized in that said two other conductive type impurity regions (6, 4) have a low impurity concentration in the vicinity (4) of said gate electrode (3), a conductive member (51) is provided to cover said low impurity concentration region (4), and said conductive member (51) is connected to said gate electrode (3) through a resistance.
Claim 3
Dependent Claim
23 words
A semiconductor device according to claim 1, wherein said conductive member (51) and said gate electrode (3) are composed of the same material.
Claim 4
Dependent Claim
18 words
A semiconductor device according to claim 1, wherein said conductive member (51) is composed of a poly-crystal semiconductor.
Claim 5
Dependent Claim
109 words
A semiconductor device having two other conductive type impurity regions formed in one conductive type semiconductor region and a gate electrode formed through a passivation film formed to cover at least the region between said two other conductive type impurity regions on the main surface of said one conductive type semiconductor region, characterized in that said two other conductive type impurity regions (6, 4) have a low impurity concentration in the vicinity (4) of said gate electrode (3), a conductive member (51) is provided to cover said low impurity concentration region (4), and a resistance member (13) is interposed between said conductive member (51) and said gate electrode (3).
Claim 6
Dependent Claim
109 words
A semiconductor device having two other conductive type impurity regions formed in one conductive type semiconductor region and a gate electrode formed through a passivation film formed to cover at least the region between said two other conductive type impurity regions on the main surface of said one conductive type semiconductor region, characterized in that said two other conductive type impurity regions (6, 4) have a low impurity concentration in the vicinity (4) of said gate electrode (3), a conductive member (51) is provided to cover said low impurity concentration region (4), and a resistance member (13) is interposed between said conductive member (51) and said gate electrode (3).
Claim 7
Dependent Claim
23 words
A semiconductor device according to claim 4, wherein said conductive member (51) and said gate electrode (3) are composed of the same material.
Claim 8
Dependent Claim
18 words
A semiconductor device according to claim 4, wherein said conductive member (51) is composed of a poly-crystal semiconductor.
Claim 9
Dependent Claim
17 words
A semiconductor device according to claim 4, said resistance member (13) is composed of a semiconductor oxide.
Claim 10
Dependent Claim
142 words
A semiconductor device having two other conductive type impurity regions formed in one conductive type semiconductor region and a gate electrode formed through a passivation film formed to cover at least the region between said two other conductive type impurity regions on the main surface of said one conductive type semiconductor region, characterized in that said gate electrode (3) is divided into a first gate electrode, a second gate electrode, and a third gate electrode, said first gate electrode lies on one of said two other conductive type impurity regions (6, 4), said third gate electrode lies on the other of said two other conductive type impurity regions (6, 4), and the first gate electrode is connected to the second gate electrode through a resistance (13) and the second gate electrode is connected to the third gate electrode through a resistance (13).
Claim 11
Dependent Claim
142 words
A semiconductor device having two other conductive type impurity regions formed in one conductive type semiconductor region and a gate electrode formed through a passivation film formed to cover at least the region between said two other conductive type impurity regions on the main surface of said one conductive type semiconductor region, characterized in that said gate electrode (3) is divided into a first gate electrode, a second gate electrode, and a third gate electrode, said first gate electrode lies on one of said two other conductive type impurity regions (6, 4), said third gate electrode lies on the other of said two other conductive type impurity regions (6, 4), and the first gate electrode is connected to the second gate electrode through a resistance (13) and the second gate electrode is connected to the third gate electrode through a resistance (13).
Claim 12
Dependent Claim
21 words
A semiconductor device according to claim 8, wherein said first, second and third gate electrodes are composed of the same material.
Claim 13
Dependent Claim
21 words
A semiconductor device according to claim 8, wherein said first, second and third gate electrodes are composed of a poly-crystal semiconductor.
Claim 14
Dependent Claim
28 words
A semiconductor device according to claim 8, wherein said first gate electrode and said third gate electrode are electrically connected to said second electrode through a resistance (13).
Claim 15
Dependent Claim
97 words
A semiconductor device of a MIS or MOS structure of a metal/passivation film/semiconductor formed on a semiconductor substrate wherein after a low concentration impurity layer has been formed using a gate as a mask, a side wall is provided on a gate side and a low concentration offset region is provided between high concentration source and drain diffusion layers and a channel layer using the side wall as a mask, characterized in that said side wall (51) is made conductive and said side wall (51) is electrically connected to a gate electrode (3) through a resistance (13).
Claim 16
Dependent Claim
97 words
A semiconductor device of a MIS or MOS structure of a metal/passivation film/semiconductor formed on a semiconductor substrate wherein after a low concentration impurity layer has been formed using a gate as a mask, a side wall is provided on a gate side and a low concentration offset region is provided between high concentration source and drain diffusion layers and a channel layer using the side wall as a mask, characterized in that said side wall (51) is made conductive and said side wall (51) is electrically connected to a gate electrode (3) through a resistance (13).
Claim 17
Dependent Claim
23 words
A semiconductor device according to claim 12, wherein said side wall (51) and said gate electrode (3) are composed of the same material.
Claim 18
Dependent Claim
18 words
A semiconductor device according to claim 12, wherein said side wall (51) is composed of a poly-crystal semiconductor.
Claim 19
Independent Claim
91 words
A method of manufacturing a semiconductor device, comprising the processes of: (1) forming a gate passivation film (2), a gate electrode (3) and source-drain low impurity concentration layer (4) on a semiconductor substrate (1); (2) forming a passivation thin film on a surface of the gate electrode (3); (3) forming a poly-crystal semiconductor film (51) on the passivation thin film; and (4) remaining the poly-crystal semiconductor film (51) only on a side wall of the gate electrode (3) after step (3); and (5) forming a source-drain high impurity concentration layer (6).
Claim 20
Independent Claim
91 words
A method of manufacturing a semiconductor device, comprising the processes of: (1) forming a gate passivation film (2), a gate electrode (3) and source-drain low impurity concentration layer (4) on a semiconductor substrate (1); (2) forming a passivation thin film on a surface of the gate electrode (3); (3) forming a poly-crystal semiconductor film (51) on the passivation thin film; and (4) remaining the poly-crystal semiconductor film (51) only on a side wall of the gate electrode (3) after step (3); and (5) forming a source-drain high impurity concentration layer (6).
Claim 21
Dependent Claim
20 words
A method of manufacturing a semiconductor device according to claim 15, wherein said process step (4) uses an RIE etching.
Claim 22
Dependent Claim
21 words
A method of manufacturing a semiconductor device according to claim 15, wherein said process step (5) uses an ion implantation method.
Claim 23
Dependent Claim
63 words
A semiconductor device having two impurity regions formed in one conductive type semiconductor region and a gate electrode provided on a main surface of said one conductive type semiconductor region between said two impurity regions through a passivation film, characterized in that a conductive member (51) is formed on a side wall of said gate electrode (3) through a high resistance layer (13).
Claim 24
Dependent Claim
63 words
A semiconductor device having two impurity regions formed in one conductive type semiconductor region and a gate electrode provided on a main surface of said one conductive type semiconductor region between said two impurity regions through a passivation film, characterized in that a conductive member (51) is formed on a side wall of said gate electrode (3) through a high resistance layer (13).
References Cited (Backward Citations)
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