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JPS63296374A Expired / Lapsed JP ⏱️ 0.0 years remaining

Mos-type semiconductor device

Assignee: Panasonic Holdings Corp
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Filing: 1987-05-28
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Granted: —
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Expires: 2007-05-28
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Abstract

Abstract PURPOSE:To provide a high-speed device by a method wherein source and drain regions of low impurity concentration in an LDD (Lightly-Doped Drain) structure are covered with a side wall gate and their electrical conditions are controlled by the side wall gate. CONSTITUTION:A side wall gate 9 is provided at an end face of a gate electrode 4 through the intermediary of a tunnel oxide film 8 and a low-concentration source and drain regions 71 and 72 are covered with the side wall gate 9. The side wall gate 9 is connected by the tunnel effect to the gate electrode 4. In such a design, a change in the potential of the gate electrode 4 causes a change in the potential of the side wall gate 9, which means that the low-concentration source and drain regions 71 and 72 are under control of the gate electrode 4. For example, in case of an N-channel device, application of a positive potential through a gate electrode 4 not only induces many electrons in the N-channel itself but also in a low-concentration source and drain regions 71 and 72. This accelerated the circuit operating speed.

Inventors

  • 👤 Takeya Ezaki
  • 👤 豪弥 江崎

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-03 08:35
CPC Classifications
—

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