US5686318A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of forming a die-to-insert permanent connection
Assignee: Micron Technology Inc
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Filing: 1995-12-22
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Granted: 1997-11-11
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Expires: 2015-12-22
Abstract
Abstract The invention disclosed herein is a semiconductor die assembly and method of making the same having a die and insert substrate that are electrically interconnected by diffusing gold bumps attached to the connecting surface of the substrate to aluminum-based bond pads on the die to form a permanent die-to-insert connection. The process for diffusing the gold bumps into the bond pads preferably occurs during a burn-in process wherein pressure and heat are applied to the die/substrate assembly without melting the gold bumps until a permanent die-to-insert substrate connection is properly made.
Inventors
- 👤 Warren M. Farnworth
- 👤 Alan G. Wood
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 01:10
CPC Classifications
H; H10; H10W; H10W40/00; H10W40/70; H10W40/77; H10W70/00; H10W70/60; H10W70/62; H10W70/66; H10W72/00; H10W78/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/20; H10W72/261; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/851; H10W72/874; H10W72/877; H10W72/90; H10W72/941; H10W72/9415; H10W72/944; H10W72/9445
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
181 words
A method for forming a permanent chip-to-substrate electrical interconnection, comprising: forming at least one conductive connection bump of a diffusible material having a melting temperature on a surface of a substrate; placing a semiconductor chip having at least one bond pad thereon onto said at least one conductive connection bump of said substrate with said at least one bond pad in contact with said at least one conductive connection bump; applying a force to bias said substrate and said chip together; and heating said substrate and said semiconductor chip under said applied force to a temperature below said melting temperature of said diffusible material and sufficient to diffuse diffusible material of said at least one conductive connection bump in contact with said at least one bond pad into said at least one bond pad to form a metallurgical bond therewith, wherein said heating is performed for a duration of time to effect an amount of diffusion of said diffusible material of said at least one conductive connection bump into said at least one bond pad sufficient to form said permanent interconnection.
Claim 2
Independent Claim
181 words
A method for forming a permanent chip-to-substrate electrical interconnection, comprising: forming at least one conductive connection bump of a diffusible material having a melting temperature on a surface of a substrate; placing a semiconductor chip having at least one bond pad thereon onto said at least one conductive connection bump of said substrate with said at least one bond pad in contact with said at least one conductive connection bump; applying a force to bias said substrate and said chip together; and heating said substrate and said semiconductor chip under said applied force to a temperature below said melting temperature of said diffusible material and sufficient to diffuse diffusible material of said at least one conductive connection bump in contact with said at least one bond pad into said at least one bond pad to form a metallurgical bond therewith, wherein said heating is performed for a duration of time to effect an amount of diffusion of said diffusible material of said at least one conductive connection bump into said at least one bond pad sufficient to form said permanent interconnection.
Claim 3
Independent Claim
175 words
A method for forming a permanent chip-to-substrate electrical interconnection comprising: forming at least one conductive connection bump of a diffusible material having a melting temperature on a surface of a substrate; placing a semiconductor chip having at least one bond pad thereon onto said at least one conductive connection bump of said substrate with said at least one bond pad in contact with said at least one conductive connection bump; applying a force to bias said substrate and said chip together at a magnitude sufficient to effect an amount of diffusion of said diffusible material of said at least one conductive connection bump into said at least one bond pad sufficient to form said permanent interconnection; and heating said substrate and said semiconductor chip under said applied force to a temperature below said melting temperature of said diffusible material and sufficient to diffuse diffusible material of said at least one conductive connection bump in contact with said at least one bond pad into said at least one bond pad to form a metallurgical bond therewith.
Claim 4
Independent Claim
175 words
A method for forming a permanent chip-to-substrate electrical interconnection comprising: forming at least one conductive connection bump of a diffusible material having a melting temperature on a surface of a substrate; placing a semiconductor chip having at least one bond pad thereon onto said at least one conductive connection bump of said substrate with said at least one bond pad in contact with said at least one conductive connection bump; applying a force to bias said substrate and said chip together at a magnitude sufficient to effect an amount of diffusion of said diffusible material of said at least one conductive connection bump into said at least one bond pad sufficient to form said permanent interconnection; and heating said substrate and said semiconductor chip under said applied force to a temperature below said melting temperature of said diffusible material and sufficient to diffuse diffusible material of said at least one conductive connection bump in contact with said at least one bond pad into said at least one bond pad to form a metallurgical bond therewith.
Claim 5
Dependent Claim
28 words
The method of claim 1, wherein the temperature of said heating is a function of the time said substrate and said semiconductor chip are exposed to said temperature.
Claim 6
Dependent Claim
29 words
The method of claim 1, further including selecting a substrate material that has a coefficient of thermal expansion that approximately matches a coefficient of thermal expansion of said chip.
Claim 7
Dependent Claim
14 words
The method of claim 4, further including selecting said substrate from a ceramic material.
Claim 8
Dependent Claim
41 words
The method of claim 1, wherein said at least one conductive connection bump comprises a plurality of bumps, said at least one bond pad comprises a plurality of bond pads, and wherein a plurality of bump-to-pad interconnections are formed substantially simultaneously.
Claim 9
Dependent Claim
24 words
The method of claim 1, further including forming said at least one conductive connection bump out of elemental gold, a gold alloy, or aluminum.
Claim 10
Dependent Claim
16 words
The method of claim 1, further including selecting said semiconductor wherein said bond pads are aluminum-based.
Claim 11
Dependent Claim
14 words
The method of claim 1, wherein said temperature is maintained for approximately 24 hours.
Claim 12
Dependent Claim
130 words
A process for forming permanent die-to-substrate electrical interconnections during the burn-in process, comprising: inserting a substrate having a plurality of gold connection bumps thereon into a carrier; placing a die having a plurality of bond pads thereon, with the bond pads in a contacting relationship with the gold connection bumps of the substrate; attaching a clamp onto the die carrier to apply a force to bias the plurality of bond pads of the die toward the plurality of gold connection bumps of the substrate; and burning-in the die by applying heat a temperature below a melting temperature of the gold of said gold connection bumps and sufficient to form permanent metallurgical bump-to-bond pad interconnections through gold diffusion from said plurality of gold connection bumps into said plurality of bond pads.
Claim 13
Dependent Claim
130 words
A process for forming permanent die-to-substrate electrical interconnections during the burn-in process, comprising: inserting a substrate having a plurality of gold connection bumps thereon into a carrier; placing a die having a plurality of bond pads thereon, with the bond pads in a contacting relationship with the gold connection bumps of the substrate; attaching a clamp onto the die carrier to apply a force to bias the plurality of bond pads of the die toward the plurality of gold connection bumps of the substrate; and burning-in the die by applying heat a temperature below a melting temperature of the gold of said gold connection bumps and sufficient to form permanent metallurgical bump-to-bond pad interconnections through gold diffusion from said plurality of gold connection bumps into said plurality of bond pads.
Claim 14
Dependent Claim
33 words
The process of claim 10, further including selecting said substrate such that the coefficient of thermal expansion of said substrate is approximately the same as the coefficient of thermal expansion of said die.
Claim 15
Dependent Claim
37 words
The process of claim 10, further including burning-in the die for a sufficient time at said temperature to ensure said diffusion of said gold from said plurality of gold connection bumps sufficient to form said permanent interconnections.
Claim 16
Dependent Claim
14 words
The process of claim 10, further including electrically testing said die during said burn-in.
Claim 17
Dependent Claim
30 words
The method of claim 2, further including selecting a substrate material that has a coefficient of thermal expansion that approximately matches a coefficient of thermal expansion of said semiconductor chip.
Claim 18
Dependent Claim
14 words
The method of claim 14, further including selecting said substrate from a ceramic material.
Claim 19
Dependent Claim
41 words
The method of claim 3, wherein said at least one conductive connection bump comprises a plurality of bumps, said at least one bond pad comprises a plurality of bond pads, and wherein a plurality of bump-to-pad interconnections are formed substantially simultaneously.
Claim 20
Dependent Claim
24 words
The method of claim 2, further including forming said at least one conductive connection bump out of elemental gold, a gold alloy, or aluminum.
Claim 21
Dependent Claim
17 words
The method of claim 2, further including selecting said semiconductor chip wherein said bond pads are aluminum-based.
Claim 22
Dependent Claim
14 words
The method of claim 2, wherein said temperature is maintained for approximately 24 hours.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-11-10 | 2001-05-12 | 2001-11-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-11-10 | 2005-05-12 | 2005-11-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-11-10 | 2009-05-12 | 2009-11-11 | $7700.00 | Window Closed / Lapsed |