US5685071A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of constructing a sealed chip-on-board electronic module
Assignee: Raytheon Co
•
Filing: 1995-06-05
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Granted: 1997-11-11
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Expires: 2015-06-05
Abstract
Abstract A method of manufacturing an environmentally robust electronic module for aircraft avionics or other military or commercial electronic systems. The method produces a sealed chip-on-board electronic module and comprises the following steps. A printed wiring board is provided having an electrical interconnection circuit printed thereon. Bare integrated circuit chips directly mounted and wirebonded to the printed wiring board. Solderable components are then mounted and conductively connected to the printed wiring board to produce a chip-on-board electronic module. The chip-on-board electronic module is then passivated with silicon nitride to produce a sealed chip-on-board electronic module. The electronic module is passivated by applying a coating of silicon nitride using a plasma enhanced chemical vapor deposition process at a temperature near room temperature so that no stress is induced in the integrated circuit chips or wirebonds of the electronic module. The silicon nitride coating typically has a thickness on the order of one-half micron. After passivation, the sealed chip-on-board electronic module is encapsulated or a cover is disposed thereon.
Inventors
- 👤 Louis E. Gates, Jr.
- 👤 Michael D. Runyan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 13:42
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H10W74/121; H10W72/00; H10W72/01; H10W72/015; H10W72/01515; H10W72/071; H10W72/073; H10W72/075; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/951; H10W90/00; H10W90/701; H10W90/731; H10W90/734; H10W90/751; H10W90/754; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49144
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
69 words
A method of manufacturing a sealed chip-on-board electronic module, said method comprising the steps of: providing a printed wiring board having an electrical interconnection circuit printed thereon; mounting and electrically connecting solderable components to the printed wiring board; mounting and wirebonding integrated circuit chips directly to the printed wiring board; passivating the chip-on-board electronic module to produce a sealed chip-on-board electronic module; and encapsulating the sealed chip-on-board electronic module.
Claim 2
Independent Claim
69 words
A method of manufacturing a sealed chip-on-board electronic module, said method comprising the steps of: providing a printed wiring board having an electrical interconnection circuit printed thereon; mounting and electrically connecting solderable components to the printed wiring board; mounting and wirebonding integrated circuit chips directly to the printed wiring board; passivating the chip-on-board electronic module to produce a sealed chip-on-board electronic module; and encapsulating the sealed chip-on-board electronic module.
Claim 3
Dependent Claim
52 words
The method of claim 1 wherein the step of passivating the chip-on-board electronic module comprises the step of applying a coating of silicon nitride using a plasma enhanced chemical vapor deposition process under near room temperature conditions that causes no stress on the integrated circuit chips and wirebonds of the electronic module.
Claim 4
Dependent Claim
22 words
The method of claim 1 wherein the coating comprises a silicon nitride layer having a thickness on the order of one-half micron.
Claim 5
Dependent Claim
23 words
The method of claim 1 further comprising the steps of: bonding passive components to the printed wiring board; and curing the bonded components.
Claim 6
Dependent Claim
65 words
The method of claim 1 wherein the step of mounting and wirebonding integrated circuit chips comprises the steps of: applying integrated circuit chip adhesive to predetermined integrated circuit chip locations on the printed wiring board; mounting integrated circuit chips to the printed wiring board using the chip adhesive; and wirebonding the integrated circuit chips to the electrical interconnection circuit printed on the printed wiring board.
Claim 7
Dependent Claim
26 words
The method of claim 1 wherein the step of encapsulating the sealed chip-on-board electronic module comprises the step of encapsulating the wirebonded chips with an encapsulant.
Claim 8
Dependent Claim
19 words
The method of claim 1 further comprising the step of disposing a cover on the encapsulated chip-on-board electronic module.
Claim 9
Independent Claim
116 words
A method of manufacturing a sealed chip-on-board electronic module, said method comprising the steps of: providing a printed wiring board having an electrical interconnection circuit printed thereon; mounting the printed wiring board directly onto a heat sink; mounting and conductively connecting solderable components to the printed wiring board; mounting and wirebonding integrated circuit chips directly onto the printed wiring board; passivating the chip-on-board electronic module with silicon nitride by applying a coating of silicon nitride using a plasma enhanced chemical vapor deposition process at near room temperature that causes no stress on the integrated circuit chips or wirebonds of the electronic module to produce a sealed chip-on-board electronic module; and encapsulating the sealed chip-on-board electronic module.
Claim 10
Independent Claim
116 words
A method of manufacturing a sealed chip-on-board electronic module, said method comprising the steps of: providing a printed wiring board having an electrical interconnection circuit printed thereon; mounting the printed wiring board directly onto a heat sink; mounting and conductively connecting solderable components to the printed wiring board; mounting and wirebonding integrated circuit chips directly onto the printed wiring board; passivating the chip-on-board electronic module with silicon nitride by applying a coating of silicon nitride using a plasma enhanced chemical vapor deposition process at near room temperature that causes no stress on the integrated circuit chips or wirebonds of the electronic module to produce a sealed chip-on-board electronic module; and encapsulating the sealed chip-on-board electronic module.
Claim 11
Dependent Claim
22 words
The method of claim 8 wherein the coating comprises a silicon nitride layer having a thickness on the order of one-half micron.
Claim 12
Dependent Claim
30 words
The method of claim 8 further comprising the steps of: bonding passive components to the printed wiring board prior to mounting the integrated circuit chips; and curing the bonded components.
Claim 13
Dependent Claim
65 words
The method of claim 10 wherein the step of mounting and wirebonding integrated circuit chips comprises the steps of: applying integrated circuit chip adhesive to predetermined integrated circuit chip locations on the printed wiring board; mounting integrated circuit chips to the printed wiring board using the chip adhesive; and wirebonding the integrated circuit chips to the electrical interconnection circuit printed on the printed wiring board.
Claim 14
Dependent Claim
25 words
The method of claim 8 wherein the step of encapsulating the sealed chip-on-board electronic module comprises the step of encapsulating wirebonded chips with an encapsulant.
Claim 15
Dependent Claim
19 words
The method of claim 11 further comprising the step of attaching a cover to the sealed chip-on-board electronic module.
Claim 16
Independent Claim
135 words
A method of manufacturing a sealed chip-on-board electronic module, said method comprising the steps of: providing a printed wiring board having an electrical interconnection circuit printed thereon; cleaning the printed wiring board; mounting and conductively connecting solderable components to the printed wiring board; cleaning flux from the printed wiring board; bonding passive components to the printed wiring board; curing the bonded components; applying integrated circuit chip adhesive to predetermined integrated circuit chip locations on the printed wiring board; mounting integrated circuit chips to the printed wiring board using the chip adhesive; wirebonding the integrated circuit chips to the electrical interconnection circuit on the printed wiring board to produce a functional chip-on-board electronic module; passivating the chip-on-board electronic module with silicon nitride to produce a sealed chip-on-board electronic module; and encapsulating the sealed chip-on-board electronic module.
Claim 17
Independent Claim
135 words
A method of manufacturing a sealed chip-on-board electronic module, said method comprising the steps of: providing a printed wiring board having an electrical interconnection circuit printed thereon; cleaning the printed wiring board; mounting and conductively connecting solderable components to the printed wiring board; cleaning flux from the printed wiring board; bonding passive components to the printed wiring board; curing the bonded components; applying integrated circuit chip adhesive to predetermined integrated circuit chip locations on the printed wiring board; mounting integrated circuit chips to the printed wiring board using the chip adhesive; wirebonding the integrated circuit chips to the electrical interconnection circuit on the printed wiring board to produce a functional chip-on-board electronic module; passivating the chip-on-board electronic module with silicon nitride to produce a sealed chip-on-board electronic module; and encapsulating the sealed chip-on-board electronic module.
Claim 18
Dependent Claim
22 words
The method of claim 14 further comprising the step of mounting and bonding the printed wiring board directly onto a heat sink.
Claim 19
Dependent Claim
52 words
The method of claim 14 wherein the step of passivating the chip-on-board electronic module comprises the step of applying a coating of silicon nitride using a plasma enhanced chemical vapor deposition process under near room temperature conditions that causes no stress on the integrated circuit chips or wirebonds of the electronic module.
Claim 20
Dependent Claim
22 words
The method of claim 14 wherein the coating comprises a silicon nitride layer having a thickness on the order of one-half micron.
Claim 21
Dependent Claim
28 words
The method of claim 14 wherein the step of enclosing the sealed chip-on-board electronic module comprises the step of attaching a cover to the sealed chip-on-board electronic module.
Claim 22
Dependent Claim
19 words
The method of claim 14 further comprising the step of testing the chip-on-board electronic module prior to passivating it.
References Cited (Backward Citations)
US4650922A
Cited
JPS62242310A
Cited
US4855868A
Cited
US4849856A
Cited
US5192995A
Cited
JPH0276249A
Cited
JPH02346A
Cited
US5315194A
Cited
US5206986A
Cited
US5199164A
Cited
US5296739A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-11-10 | 2001-05-12 | 2001-11-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-11-10 | 2005-05-12 | 2005-11-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-11-10 | 2009-05-12 | 2009-11-11 | $7700.00 | Window Closed / Lapsed |