US5684393A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Linear transconductors
Assignee: STMicroelectronics lnc USA
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Filing: 1995-06-01
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Granted: 1997-11-04
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Expires: 2015-06-01
Abstract
Abstract An integrated transconductor circuit in which the input transistor(s) passes a current across a reference resistor. This conventional arrangement produces current error terms of Vbe/R and Ib. According to the present invention, these terms are compensated by providing a compensation resistor which is matched to the first resistor, and a compensation transistor which is matched to the input transistor, interconnected to feed the appropriate current components to the output. For even better compensation, an additional transistor is optionally added to remove the effect of base current of the compensation transistor. In differential embodiments, the compensation resistor may be bridged or split. Zero, one, or more stages of current mirroring can optionally be used to provide the desired output.
Inventors
- 👤 Marc Ryat
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 22:32
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/34; H03F3/343; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/265; H03F2200/00; H03F2200/261
Claims Analysis
Total Claims: 29
Claim 1
Independent Claim
203 words
A method for operating a transconductor integrated circuit, comprising the steps of: receiving an input voltage on the base of a first transistor, and passing a first current through a first reference resistance accordingly, to produce a first collector current which is approximately equal to the input voltage divided by the value of said first reference resistance: driving a second transistor, which is matched to said first transistor, with a second collector current which is equal to said first collector current while holding the base-emitter voltage of said second transistor equal to the base-emitter voltage of said first transistor, to produce a first compensation current component which is equal to the base current of said first transistor, and also to the base current of said second transistor; generating, in a second resistance which is matched to said first reference resistance, a second current compensation component corresponding to the Vbe drop of said first transistor divided by the resistance of said first reference resistance; and combining said first and second current compensation components with a component corresponding to said first collector current, to accordingly provide a current output which very closely approximates the input voltage divided by the value of said first reference resistance.
Claim 2
Independent Claim
203 words
A method for operating a transconductor integrated circuit, comprising the steps of: receiving an input voltage on the base of a first transistor, and passing a first current through a first reference resistance accordingly, to produce a first collector current which is approximately equal to the input voltage divided by the value of said first reference resistance: driving a second transistor, which is matched to said first transistor, with a second collector current which is equal to said first collector current while holding the base-emitter voltage of said second transistor equal to the base-emitter voltage of said first transistor, to produce a first compensation current component which is equal to the base current of said first transistor, and also to the base current of said second transistor; generating, in a second resistance which is matched to said first reference resistance, a second current compensation component corresponding to the Vbe drop of said first transistor divided by the resistance of said first reference resistance; and combining said first and second current compensation components with a component corresponding to said first collector current, to accordingly provide a current output which very closely approximates the input voltage divided by the value of said first reference resistance.
Claim 3
Dependent Claim
27 words
A method according to claim 1, wherein a current mirror circuit is connected to said first transistor to provide said second collector current to said second transistor.
Claim 4
Dependent Claim
58 words
A method according to claim 1, wherein a current mirror circuit is connected to said first transistor to provide said second collector current to said second transistor and a second current mirror circuit is connected to combine said first and second current compensation components and said component corresponding to said first collector current to provide said current output.
Claim 5
Dependent Claim
28 words
A method according to claim 1, further comprising the step of connecting a compensating transistor to said second transistor to produce said base current of said second transistor.
Claim 6
Dependent Claim
21 words
A method according to claim 1, further comprising the step of interposing at least one cascode transistor in said current output.
Claim 7
Dependent Claim
23 words
A method according to claim 1, further comprising the step of mirroring said current output to produce multiple copies of said current output.
Claim 8
Dependent Claim
16 words
A method according to claim 1, wherein said first and second transistors are NPN bipolar transistors.
Claim 9
Dependent Claim
16 words
A method according to claim 1, wherein said first and second transistors are connected in series.
Claim 10
Dependent Claim
19 words
A method according to claim 1, wherein said first and second transistors both have betas of at least 90.
Claim 11
Independent Claim
263 words
A method for operating a differential transconductor integrated circuit, comprising the steps of: receiving a differential input voltage on the bases of a pair of first bipolar transistors, and passing a first current through a first reference resistance accordingly, to produce a collector current on a collector of each of said first transistors which is approximately equal to said input voltage to each of said transistors divided by the resistance value of said first reference resistance; driving a pair of second bipolar transistors, each of which is matched to a respective said first transistor, with a collector current which is equal to the collector current of its respective said first transistor, while holding the base-emitter voltage of each of said second transistor equal to the base-emitter voltage of its respective said first transistor, to produce a pair of first compensation current components which are equal to the base currents of respective said first transistors, and also to the base current of respective said second transistors; generating, in a pair of second resistances, which are matched to said first reference resistance, a pair of second current compensation components corresponding to the Vbe drop of respective said first transistors divided by the resistance value of said first reference resistance; and combining respective said first and second current compensation components with a pair of components corresponding to respective said collector currents, to accordingly provide a pair of current outputs which very closely approximate the respective input voltages divided by the resistance values of said first reference resistance; wherein said current outputs provide a differential transconductor output.
Claim 12
Independent Claim
263 words
A method for operating a differential transconductor integrated circuit, comprising the steps of: receiving a differential input voltage on the bases of a pair of first bipolar transistors, and passing a first current through a first reference resistance accordingly, to produce a collector current on a collector of each of said first transistors which is approximately equal to said input voltage to each of said transistors divided by the resistance value of said first reference resistance; driving a pair of second bipolar transistors, each of which is matched to a respective said first transistor, with a collector current which is equal to the collector current of its respective said first transistor, while holding the base-emitter voltage of each of said second transistor equal to the base-emitter voltage of its respective said first transistor, to produce a pair of first compensation current components which are equal to the base currents of respective said first transistors, and also to the base current of respective said second transistors; generating, in a pair of second resistances, which are matched to said first reference resistance, a pair of second current compensation components corresponding to the Vbe drop of respective said first transistors divided by the resistance value of said first reference resistance; and combining respective said first and second current compensation components with a pair of components corresponding to respective said collector currents, to accordingly provide a pair of current outputs which very closely approximate the respective input voltages divided by the resistance values of said first reference resistance; wherein said current outputs provide a differential transconductor output.
Claim 13
Dependent Claim
31 words
A method according to claim 10, wherein a pair of current mirror circuits are connected to respective said first transistors to provide said respective collector currents to respective said second transistors.
Claim 14
Dependent Claim
65 words
A method according to claim 10, wherein a pair of current mirror circuits are connected to respective said first transistors to provide said respective collector currents to said second transistors and a pair of second current mirror circuits are connected to combine respective said first and second current compensation components and respective said components corresponding to said collector currents to provide respective said current outputs.
Claim 15
Dependent Claim
31 words
A method according to claim 10, further comprising the step of connecting a pair of compensating transistors to respective said second transistors to produce said base currents of said second transistors.
Claim 16
Dependent Claim
24 words
A method according to claim 10, further comprising the step of interposing at least one pair of cascode transistors in respective said current outputs.
Claim 17
Dependent Claim
23 words
A method according to claim 10, further comprising the step of mirroring said current outputs to produce multiple copies of said current outputs.
Claim 18
Dependent Claim
18 words
A method according to claim 10, wherein said pairs of first and second transistors are PNP bipolar transistors.
Claim 19
Dependent Claim
21 words
A method according to claim 10, wherein respective each of said pairs of first and second transistors are connected in series.
Claim 20
Dependent Claim
20 words
A method according to claim 10, wherein each of said first and second transistors have betas of at least 90.
Claim 21
Independent Claim
203 words
A method for operating a transconductor integrated circuit, comprising the steps of: receiving an input voltage on the base of a first transistor, and passing a first current through a first resistance accordingly, to produce a first collector current which is approximately equal to the input voltage divided by the value of said first resistance: mirroring said first collector current with a current mirror circuit to produce a mirrored current; driving a second transistor, which is matched to said first transistor, with said mirrored current while holding the base-emitter voltage of said second transistor equal to the base-emitter voltage of said first transistor, to produce a first compensation current component which is equal to the base current of said first transistor, and also to the base current of said second transistor; generating, in a second resistance which is matched to said first resistance, a second current compensation component corresponding to the Vbe drop of said second transistor divided by the resistance of said first resistance; and combining said first and second current compensation components with a component corresponding to said collector current, to accordingly provide a current output which very closely approximates the input voltage divided by the value of said first resistance.
Claim 22
Independent Claim
203 words
A method for operating a transconductor integrated circuit, comprising the steps of: receiving an input voltage on the base of a first transistor, and passing a first current through a first resistance accordingly, to produce a first collector current which is approximately equal to the input voltage divided by the value of said first resistance: mirroring said first collector current with a current mirror circuit to produce a mirrored current; driving a second transistor, which is matched to said first transistor, with said mirrored current while holding the base-emitter voltage of said second transistor equal to the base-emitter voltage of said first transistor, to produce a first compensation current component which is equal to the base current of said first transistor, and also to the base current of said second transistor; generating, in a second resistance which is matched to said first resistance, a second current compensation component corresponding to the Vbe drop of said second transistor divided by the resistance of said first resistance; and combining said first and second current compensation components with a component corresponding to said collector current, to accordingly provide a current output which very closely approximates the input voltage divided by the value of said first resistance.
Claim 23
Dependent Claim
39 words
A method according to claim 19, further including the step of providing a second current mirror circuit to combine said first and second current compensation components and said component corresponding to said collector current to provide said current output.
Claim 24
Dependent Claim
28 words
A method according to claim 19, further comprising the step of connecting a compensating transistor to said second transistor to produce said base current of said second transistor.
Claim 25
Dependent Claim
21 words
A method according to claim 19, further comprising the step of interposing at least one cascode transistor in said current output.
Claim 26
Dependent Claim
23 words
A method according to claim 19, further comprising the step of mirroring said current output to produce multiple copies of said current output.
Claim 27
Dependent Claim
14 words
A method according to claim 19, wherein said first and second transistors are NPN.
Claim 28
Dependent Claim
16 words
A method according to claim 19, wherein said first and second transistors are connected in series.
Claim 29
Dependent Claim
19 words
A method according to claim 19, wherein said first and second transistors both have betas of at least 90.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-11-03 | 2001-05-05 | 2001-11-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-11-03 | 2005-05-05 | 2005-11-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-11-03 | 2009-05-05 | 2009-11-04 | $7700.00 | Window Closed / Lapsed |