CMOS Precision voltage reference generator

Claim 2

A reference voltage generator circuit for implementation in CMOS technology, said circuit comprising: a first means for generating a differential voltage; a second means for amplifying and shifting the differential voltage to provide a single ended voltage; and a third means for selectively removing unwanted components from said single ended voltage and to provide a reference voltage that is supply and temperature independent; said third means including a voltage follower network having an input node and an output node, a first and a second current mirror networks connected in series to the voltage follower network wherein the gain of the current mirrors is 2 and 1, respectively.

Claim 3

The reference voltage generator of claim 1 further including a power supply operating within a voltage range of 5 volts and ground; said power supply being operable for supplying power to the first, second and third means.

Claim 4

The reference voltage generator of claim 1 wherein the first means includes: an operational amplifier having an output node, an inverting input and non-inverting input; a first biasing network coupling the output node and the non-inverting input to a first and a second voltage levels; and a second biasing network coupling the inverting input to the first and the second voltage levels whereby the first and second biasing networks are being connected in a parallel configuration with each network having a current source connected in series with an FET device.

Claim 5

The reference voltage generator set forth in claim 3 wherein current sources of the first network and the second network are identical and threshold voltages of FET devices of the first network and the second network are different.

Claim 6

The reference voltage generator of claim 1 wherein the second means includes an operational amplifier having an inverting input, a non-inverting input and an output node; a first storage means connected to the inverting input; a first switching means connected to said first storage means; a biasing network interconnecting the non-inverting input between a first and a second voltage level; a feedback network interconnecting the output node to the inverting input; a second switch means connected in series with the output node; and a second storage means interconnecting the second switch means between a third and a fourth voltage level.

Claim 7

The reference voltage generator set forth in claim 5 wherein the biasing network includes identical series connected resistor.

Claim 8

The reference voltage generator set forth in claims 5 or 6 wherein the feedback network includes a capacitor connected in parallel with a switch.

Claim 9

A reference voltage generator circuit for implementation in CMOS technology, said circuit comprising: a first means for generating a differential voltage; a second means for amplifying and shifting the differential voltage to provide a single ended voltage; and a third means, including a voltage follower network having an input node and an output node, a first current mirror network with a gain of at least two coupled to the output node; and a second current mirror network with a gain of at least one coupling an output of said first current mirror to an output terminal for selectively removing unwanted components from said single ended voltage and to provide a reference voltage that is supply and temperature independent.

Claim 10

A reference voltage generator circuit for implementation in CMOS technology, said circuit comprising: a first means for generating a differential voltage; a second means for amplifying and shifting the differential voltage to provide a single ended voltage; and a third means, including a voltage follower network having an input node and an output node, a first current mirror network with a gain of at least two coupled to the output node; and a second current mirror network with a gain of at least one coupling an output of said first current mirror to an output terminal for selectively removing unwanted components from said single ended voltage and to provide a reference voltage that is supply and temperature independent.

Claim 11

A reference voltage generator circuit for implementation in CMOS technology, said circuit comprising: a first means for generating a differential voltage; a second means for amplifying and shifting the differential voltage to provide a single ended voltage; and a third means for selectively removing signal components caused by variations in power supply tolerances and to provide a reference voltage that is supply and temperature independent; said third means including a voltage follower network having an input node and an output node, a first and a second current mirror networks connected in series to the voltage follower network wherein the gain of the current mirrors is 2 and 1, respectively.

Claim 12

A reference voltage generator circuit for implementation in CMOS technology, said circuit comprising: a first means for generating a differential voltage; a second means for amplifying and shifting the differential voltage to provide a single ended voltage; and a third means for selectively removing signal components caused by variations in power supply tolerances and to provide a reference voltage that is supply and temperature independent; said third means including a voltage follower network having an input node and an output node, a first and a second current mirror networks connected in series to the voltage follower network wherein the gain of the current mirrors is 2 and 1, respectively.