Patent US5684308A successfully refreshed from Google Patents.
US5684308A
Expired / Lapsed
US
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CMOS-compatible InP/InGaAs digital photoreceiver
Assignee: National Technology and Engineering Solutions of Sandia LLC
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Filing: 1996-02-15
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Granted: 1997-11-04
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Expires: 2016-02-15
Abstract
Abstract A digital photoreceiver is formed monolithically on an InP semiconductor substrate and comprises a p-i-n photodetector formed from a plurality of InP/InGaAs layers deposited by an epitaxial growth process and an adjacent heterojunction bipolar transistor (HBT) amplifier formed from the same InP/InGaAs layers. The photoreceiver amplifier operates in a large-signal mode to convert a detected photocurrent signal into an amplified output capable of directly driving integrated circuits such as CMOS. In combination with an optical transmitter, the photoreceiver may be used to establish a short-range channel of digital optical communications between integrated circuits with applications to multi-chip modules (MCMs). The photoreceiver may also be used with fiber optic coupling for establishing longer-range digital communications (i.e. optical interconnects) between distributed computers or the like. Arrays of digital photoreceivers may be formed on a common substrate for establishing a plurality of channels of digital optical communication, with each photoreceiver being spaced by less than about 1 mm and consuming less than about 20 mW of power, and preferably less than about 10 mW. Such photoreceiver arrays are useful for transferring huge amounts of digital data between integrated circuits at bit rates of up to about 1000 Mb/s or more.
Inventors
- 👤 Michael L. Lovejoy
- 👤 Benny H. Rose
- 👤 David C. Craft
- 👤 Paul M. Enquist
- 👤 David B. Slater, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 14:21
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/103
Claims Analysis
Total Claims: 51
Claim 1
Independent Claim
71 words
A monolithic digital photoreceiver comprising: (a) a substrate having a plurality of semiconductor layers epitaxially grown thereon; (b) a photodetector formed within the plurality of semiconductor layers for receiving at least one incident light beam with digital data impressed thereon and generating a photocurrent signal; and (c) a switching amplifier formed within the plurality of semiconductor layers proximate to the photodetector for receiving the photocurrent signal and recovering the digital data.
Claim 2
Dependent Claim
71 words
A monolithic digital photoreceiver comprising: (a) a substrate having a plurality of semiconductor layers epitaxially grown thereon; (b) a photodetector formed within the plurality of semiconductor layers for receiving at least one incident light beam with digital data impressed thereon and generating a photocurrent signal; and (c) a switching amplifier formed within the plurality of semiconductor layers proximate to the photodetector for receiving the photocurrent signal and recovering the digital data.
Claim 3
Dependent Claim
17 words
The photoreceiver of claim 1 wherein the substrate comprises InP, and the semiconductor layers are InP/InGaAs layers.
Claim 4
Dependent Claim
12 words
The photoreceiver of claim 1 wherein the photodetector is a p-i-n photodetector.
Claim 5
Dependent Claim
13 words
The photoreceiver of claim 1 wherein the photodetector is a metal-semiconductor-metal (MSM) photodetector.
Claim 6
Dependent Claim
16 words
The photoreceiver of claim 1 wherein the switching amplifier includes an output stage comprising switching transistors.
Claim 7
Dependent Claim
14 words
The photoreceiver of claim 5 wherein the switching transistors are heterojunction bipolar transistors (HBTs).
Claim 8
Dependent Claim
14 words
The photoreceiver of claim 6 wherein the HBT switching transistors form a complimentary pair.
Claim 9
Dependent Claim
28 words
The photoreceiver of claim 1 wherein the recovered digital data has logic levels sufficient for directly driving an integrated circuit (IC) to which the photoreceiver is electrically connected.
Claim 10
Dependent Claim
16 words
The photoreceiver of claim 8 wherein the integrated circuit is a complementary metal-oxide-semiconductor (CMOS) integrated circuit.
Claim 11
Dependent Claim
18 words
The photoreceiver of claim 8 wherein the photoreceiver operates at a single power supply voltage of the IC.
Claim 12
Dependent Claim
17 words
The photoreceiver of claim 10 wherein the single power supply voltage is less than about 5 volts.
Claim 13
Dependent Claim
32 words
The photoreceiver of claim 1 wherein the switching amplifier drives a substantially capacitive load presented by at least one input gate of an integrated circuit to which the photoreceiver is electrically connected.
Claim 14
Dependent Claim
17 words
The photoreceiver of claim 12 wherein the load is about 4 picoFarads (pF) for each input gate.
Claim 15
Dependent Claim
16 words
The photoreceiver of claim 1 wherein the switching amplifier drives a load of about 50 Ω.
Claim 16
Dependent Claim
26 words
The photoreceiver of claim 1 further including a lens formed below the substrate for focusing the incident light beam through the substrate and into the photodetector.
Claim 17
Dependent Claim
20 words
The photoreceiver of claim 1 wherein the incident light beam has a wavelength in the range of about 0.95-1.6 μm.
Claim 18
Dependent Claim
23 words
The photoreceiver of claim 1 wherein digital data impressed on the incident light beam has a bit rate of about 50-1000 megabits/second (Mb/s).
Claim 19
Dependent Claim
15 words
The photoreceiver of claim 1 having a power consumption of less than about 20 mW.
Claim 20
Dependent Claim
28 words
The photoreceiver of claim 1 which in combination with an optical transmitter that generates the incident light beam defines a channel of digital optical communications between integrated circuits.
Claim 21
Dependent Claim
27 words
An array of monolithic digital photoreceivers formed according to claim 1 on the substrate, with each photoreceiver receiving a separate light beam and recovering digital data therefrom.
Claim 22
Dependent Claim
18 words
The array of photoreceivers of claim 20 wherein adjacent photoreceivers are spaced by less than about 1 mm.
Claim 23
Dependent Claim
20 words
The array of photoreceivers of claim 20 wherein each photoreceiver has a power consumption of less than about 20 mW.
Claim 24
Dependent Claim
29 words
The array of photoreceivers of claim 20 wherein each photoreceiver recovers digital data at a bit rate between about 50 and 1000 Mb/s from the light beam incident thereon.
Claim 25
Dependent Claim
32 words
The array of photoreceivers of claim 23 wherein each photoreceiver in combination with an optical transmitter that generates the incident light beam defines a channel of digital optical communications between integrated circuits.
Claim 26
Dependent Claim
44 words
The array of photoreceivers of claim 24 wherein the integrated circuits are located on different levels of a stacked multi-chip module (MCM), with each channel of digital optical communications being directed at least in part through free space between different levels of the MCM.
Claim 27
Dependent Claim
15 words
The array of photoreceivers of claim 25 wherein the integrated circuits are CMOS integrated circuits.
Claim 28
Dependent Claim
97 words
A monolithic CMOS-compatible digital photoreceiver comprising: (a) an InP substrate having a plurality of InP/InGaAs semiconductor layers grown thereon; (b) a p-i-n photodetector formed within the plurality of semiconductor layers for receiving at least one incident light beam with digital data impressed thereon and generating an electrical photocurrent signal; and (c) a heterojunction bipolar transistor (HBT) amplifier formed within the plurality of semiconductor layers proximate to the photodetector for receiving the electrical photocurrent signal and generating therefrom an amplified output signal that replicates the digital data and directly drives CMOS circuitry to which the photoreceiver is connected.
Claim 29
Dependent Claim
97 words
A monolithic CMOS-compatible digital photoreceiver comprising: (a) an InP substrate having a plurality of InP/InGaAs semiconductor layers grown thereon; (b) a p-i-n photodetector formed within the plurality of semiconductor layers for receiving at least one incident light beam with digital data impressed thereon and generating an electrical photocurrent signal; and (c) a heterojunction bipolar transistor (HBT) amplifier formed within the plurality of semiconductor layers proximate to the photodetector for receiving the electrical photocurrent signal and generating therefrom an amplified output signal that replicates the digital data and directly drives CMOS circuitry to which the photoreceiver is connected.
Claim 30
Dependent Claim
25 words
The photoreceiver of claim 27 further including a lens formed below the substrate for focusing each incident light through the substrate and into the photodetector.
Claim 31
Dependent Claim
55 words
The photoreceiver of claim 27 wherein the amplified output signal provides signal levels of less than about one-half of a CMOS power supply voltage for activating a first logic state of the CMOS circuitry and more than about one-half of the CMOS power supply voltage for activating a second logic state of the CMOS circuitry.
Claim 32
Dependent Claim
37 words
The photoreceiver of claim 29 wherein the CMOS power supply voltage is about 3.3 volts, and the signal levels are about 1.4 volts for the first logic state and about 1.55 volts for the second logic state.
Claim 33
Dependent Claim
44 words
The photoreceiver of claim 27 wherein the amplifier includes an output stage comprising a pair of switching transistors for directly switching a load provided by at least one input gate of the CMOS circuitry between a first logic state and a second logic state.
Claim 34
Dependent Claim
13 words
The photoreceiver of claim 31 wherein the switching transistors form a complementary pair.
Claim 35
Dependent Claim
21 words
The photoreceiver of claim 31 wherein the load provided by each input gate is a capacitive load of about 4 pF.
Claim 36
Dependent Claim
12 words
The photoreceiver of claim 31 wherein the load is about 50 Ω.
Claim 37
Dependent Claim
15 words
The photoreceiver of claim 27 having a power consumption of less than about 20 mW.
Claim 38
Dependent Claim
20 words
The photoreceiver of claim 27 wherein each incident light beam has a wavelength in the range of about 0.95-1.6 μm.
Claim 39
Dependent Claim
23 words
The photoreceiver of claim 27 wherein the digital data impressed upon each incident light beam has a bit rate of about 50-1000 Mb/s.
Claim 40
Dependent Claim
29 words
An array of monolithic CMOS-compatible digital photoreceivers formed according to claim 27 on the substrate with each photoreceiver receiving a separate incident light beam and recovering digital data therefrom.
Claim 41
Dependent Claim
18 words
The array of photoreceivers of claim 38 wherein adjacent photoreceivers are spaced by less than about 1 mm.
Claim 42
Dependent Claim
20 words
The array of photoreceivers of claim 38 wherein each photoreceiver has a power consumption of less than about 20 mW.
Claim 43
Dependent Claim
29 words
The array of photoreceivers of claim 38 wherein each photoreceiver recovers digital data at a bit rate between about 50 and 1000 Mb/s from the light beam incident thereon.
Claim 44
Dependent Claim
32 words
The array of photoreceivers of claim 38 wherein each photoreceiver in combination with an optical transmitter that generates the incident light beam defines a channel of digital optical communications between CMOS circuits.
Claim 45
Dependent Claim
43 words
The array of photoreceivers of claim 42 wherein the CMOS integrated circuits are located on different levels of a stacked MCM, with each channel of digital optical communications being directed at least in part through free space between different levels of the MCM.
Claim 46
Dependent Claim
90 words
A monolithic CMOS-compatible photoreceiver comprising: (a) an InP substrate having a plurality of InP/InGaAs semiconductor layers grown thereon; (b) a p-i-n photodetector formed from the semiconductor layers for detecting an incident light beam and generating therefrom an electrical photocurrent signal; (c) a heterojunction bipolar transistor (HBT) amplifier formed from the semiconductor layers for receiving the photocurrent signal and generating therefrom an amplified signal having signal levels sufficient for directly driving CMOS circuitry; and (d) a single CMOS power supply providing a voltage for biasing the photoreceiver and powering the amplifier.
Claim 47
Dependent Claim
90 words
A monolithic CMOS-compatible photoreceiver comprising: (a) an InP substrate having a plurality of InP/InGaAs semiconductor layers grown thereon; (b) a p-i-n photodetector formed from the semiconductor layers for detecting an incident light beam and generating therefrom an electrical photocurrent signal; (c) a heterojunction bipolar transistor (HBT) amplifier formed from the semiconductor layers for receiving the photocurrent signal and generating therefrom an amplified signal having signal levels sufficient for directly driving CMOS circuitry; and (d) a single CMOS power supply providing a voltage for biasing the photoreceiver and powering the amplifier.
Claim 48
Dependent Claim
30 words
The photoreceiver of claim 44 wherein the amplifier includes an output stage comprising a pair of switching output transistors for driving a substantially capacitive load presented by the CMOS circuitry.
Claim 49
Dependent Claim
13 words
The photoreceiver of claim 45 wherein the switching transistors form a complementary pair.
Claim 50
Dependent Claim
20 words
The photoreceiver of claim 44 wherein the incident light beam has a wavelength in the range of about 0.95-1.6 μm.
Claim 51
Dependent Claim
14 words
A plurality of photoreceivers according to claim 44 in the form of an array.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-11-03 | 2001-05-05 | 2001-11-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-11-03 | 2005-05-05 | 2005-11-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-11-03 | 2009-05-05 | 2009-11-04 | $7700.00 | Window Closed / Lapsed |