Method of forming a capacitor over a semiconductor substrate

Claim 1

A method of forming a capacitor over a semiconductor substrate, said method comprising the steps of: forming a first insulation fill to cover a semiconductor substrate; forming a first conductive fill over said first insulation film; forming a capacitive insulation film over said first conductive film; forming a second conductive film over said capacitive insulation film; forming a second insulation film over said second conductive film; providing a first photo-resist material over said second insulation film; subjecting said first photo-resist material to a first exposure and a first development to define a first photo-resist pattern; subjecting said capacitive insulation film, said second conductive film and said second insulation film to a first anisotropic dry etching which uses said first photo-resist pattern as a mask to define a top electrode and a capacitive dielectric film; removing said first photo-resist pattern; providing a second photo-resist material on said first conductive film and said second insulation film remaining; subjecting said second photo-resist material to a second exposure and a second development to define a second photo-resist pattern; and subjecting said first conductive film to a second anisotropic dry etching which uses said second photo-resist pattern as a mask to define a bottom electrode.

Claim 2

A method of forming a capacitor over a semiconductor substrate, said method comprising the steps of: forming a first insulation fill to cover a semiconductor substrate; forming a first conductive fill over said first insulation film; forming a capacitive insulation film over said first conductive film; forming a second conductive film over said capacitive insulation film; forming a second insulation film over said second conductive film; providing a first photo-resist material over said second insulation film; subjecting said first photo-resist material to a first exposure and a first development to define a first photo-resist pattern; subjecting said capacitive insulation film, said second conductive film and said second insulation film to a first anisotropic dry etching which uses said first photo-resist pattern as a mask to define a top electrode and a capacitive dielectric film; removing said first photo-resist pattern; providing a second photo-resist material on said first conductive film and said second insulation film remaining; subjecting said second photo-resist material to a second exposure and a second development to define a second photo-resist pattern; and subjecting said first conductive film to a second anisotropic dry etching which uses said second photo-resist pattern as a mask to define a bottom electrode.

Claim 5

A method of forming a semiconductor device integrated with a storage capacitor and a MOS field effect transistor over a semiconductor substrate, said method comprising the steps of: selectively forming a field oxide film on a passive region of a semiconductor substrate to define an active region; forming a first insulation film over said semiconductor substrate and over said field oxide film; forming a first conductive film over said first insulation film; forming a capacitive insulation film over said first conductive film; forming a second conductive film over said capacitive insulation film; forming a second insulation film over said second conductive film; providing a first photo-resist material over said second insulation film; subjecting said first photo-resist material to a first exposure and a first development to define a first photo-resist pattern selectively positioned in said passive region; subjecting said capacitive insulation film, said second conductive film and said second insulation film to a first anisotropic dry etching which uses said first photo-resist pattern as a mask to selectively form a top electrode and a capacitive dielectric film in said passive region; removing said first photo-resist pattern; providing a second photo-resist material on said first conductive film and said second insulation film remaining; subjecting said second photo-resist material to a second exposure and a second development to selectively define second photo-resist patterns in said active and passive regions; and subjecting said first conductive film to a second anisotropic dry etching which uses said second photo-resist patterns as masks to define a bottom electrode in said passive region and a gate electrode in said active region.

Claim 6

A method of forming a semiconductor device integrated with a storage capacitor and a MOS field effect transistor over a semiconductor substrate, said method comprising the steps of: selectively forming a field oxide film on a passive region of a semiconductor substrate to define an active region; forming a first insulation film over said semiconductor substrate and over said field oxide film; forming a first conductive film over said first insulation film; forming a capacitive insulation film over said first conductive film; forming a second conductive film over said capacitive insulation film; forming a second insulation film over said second conductive film; providing a first photo-resist material over said second insulation film; subjecting said first photo-resist material to a first exposure and a first development to define a first photo-resist pattern selectively positioned in said passive region; subjecting said capacitive insulation film, said second conductive film and said second insulation film to a first anisotropic dry etching which uses said first photo-resist pattern as a mask to selectively form a top electrode and a capacitive dielectric film in said passive region; removing said first photo-resist pattern; providing a second photo-resist material on said first conductive film and said second insulation film remaining; subjecting said second photo-resist material to a second exposure and a second development to selectively define second photo-resist patterns in said active and passive regions; and subjecting said first conductive film to a second anisotropic dry etching which uses said second photo-resist patterns as masks to define a bottom electrode in said passive region and a gate electrode in said active region.