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US5683920A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for fabricating semiconductor devices

Assignee: SK Hynix Inc
•
Filing: 1996-12-18
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Granted: 1997-11-04
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Expires: 2016-12-18
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Abstract

Abstract A method for fabricating a semiconductor device which is capable of forming an ultra-shallow junction causing no defect in source/drain regions. The method includes the steps of providing a semiconductor substrate formed with n and p type wells and element-isolating films, forming gate oxide films on the n and p type wells, respectively, forming a polysilicon film over the entire exposed upper surface of the resulting structure, implanting first impurity ions having an n type conductivity in a portion of the polysilicon film disposed over the p type well, implanting first impurity ions having a p type conductivity in a portion of the polysilicon film disposed over the n type well, implanting second impurity ions having the p type conductivity in portions of the polysilicon film except for portions which will be used as gate electrodes, annealing the resulting structure in such a manner that the first impurity ions having the p type conductivity are diffused into the n type well, thereby forming p + source/drain, selectively removing the polysilicon film, thereby forming n and p type gate electrodes, and implanting second impurity ions having the n type conductivity in an exposed surface portion of the p type well, thereby forming n + source/drain.

Inventors

  • 👤 Kil Ho Lee

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 01:33
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/017; H10P; H10P10/00; H10D84/02; H10D84/03; H10D84/038

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 218 words
A method for fabricating a semiconductor device comprising the steps of: providing a semiconductor substrate formed with a first and second conductive type wells and element-isolating films; forming gate oxide films on the first and second conductive type wells, respectively; forming a polysilicon film over the entire exposed upper surface of the resulting structure obtained after the formation of the gate oxide films; implanting first impurity ions having an first type conductivity in a portion of the polysilicon film disposed over the second conductive type well; implanting first impurity ions having a second type conductivity in a portion of the polysilicon film disposed over the first conductive type well; implanting second impurity ions having the second type conductivity in portions of the polysilicon film except for portions which will be used as gate electrodes; annealing the resulting structure obtained after the implantation of the second impurity ions in such a manner that the first impurity ions having the second type conductivity are diffused into the first conductive type well, thereby forming a second conductive type source/drain; selectively removing the polysilicon film, thereby forming first and second conductive type gate electrodes; and implanting second impurity ions having the first type conductivity in an exposed surface portion of the second conductive type well, thereby forming a first conductive type source/drain.
Claim 2
Independent Claim 218 words
A method for fabricating a semiconductor device comprising the steps of: providing a semiconductor substrate formed with a first and second conductive type wells and element-isolating films; forming gate oxide films on the first and second conductive type wells, respectively; forming a polysilicon film over the entire exposed upper surface of the resulting structure obtained after the formation of the gate oxide films; implanting first impurity ions having an first type conductivity in a portion of the polysilicon film disposed over the second conductive type well; implanting first impurity ions having a second type conductivity in a portion of the polysilicon film disposed over the first conductive type well; implanting second impurity ions having the second type conductivity in portions of the polysilicon film except for portions which will be used as gate electrodes; annealing the resulting structure obtained after the implantation of the second impurity ions in such a manner that the first impurity ions having the second type conductivity are diffused into the first conductive type well, thereby forming a second conductive type source/drain; selectively removing the polysilicon film, thereby forming first and second conductive type gate electrodes; and implanting second impurity ions having the first type conductivity in an exposed surface portion of the second conductive type well, thereby forming a first conductive type source/drain.
Claim 3
Dependent Claim 21 words
The method in accordance with claim 1, wherein the gate oxide films have a thickness of about 30 to 60 Å.
Claim 4
Dependent Claim 23 words
The method in accordance with claim 1, wherein the formation of the gate oxide films is carried out using a thermal oxidation process.
Claim 5
Dependent Claim 20 words
The method in accordance with claim 1, wherein the polysilicon film has a thickness of about 1,500 to 2,500 Å.
Claim 6
Dependent Claim 19 words
The method in accordance with claim 1, wherein an amorphous silicon film is formed instead of the polysilicon film.
Claim 7
Dependent Claim 20 words
The method in accordance with claim 1, wherein the first impurity ions having the first type conductivity are phosphorous ions.
Claim 8
Dependent Claim 35 words
The method in accordance with claim 6, wherein the phosphorous ions are implanted at an energy of about 40 to 60 KeV in a dose of about 3×10 15 to 1×10 16 /cm 2 .
Claim 9
Dependent Claim 20 words
The method in accordance with claim 1, wherein the first impurity ions having the second type conductivity are boron ions.
Claim 10
Dependent Claim 35 words
The method in accordance with claim 8, wherein the boron ions are implanted at an energy of about 10 KeV or less in a dose of about 3×10 15 to 1×10 16 /cm 2 .
Claim 11
Dependent Claim 21 words
The method in accordance with claim 1, wherein the second impurity ions having the second type conductivity are boron fluoride ions.
Claim 12
Dependent Claim 36 words
The method in accordance with claim 10, wherein the boron fluoride ions are implanted at an energy of about 15 to 30 KeV in a dose of about 3×10 15 to 1×10 16 /cm 2 .
Claim 13
Dependent Claim 32 words
The method in accordance with claim 1, wherein the annealing step is carried out at a temperature of about 850° to 900° C. in a nitrogen atmosphere for 30 to 60 minutes.
Claim 14
Dependent Claim 33 words
The method in accordance with claim 1, wherein the annealing step is rapidly carried out at a temperature of about 1,000° to 1,100° C. in a nitrogen atmosphere for 10 to 30 seconds.
Claim 15
Dependent Claim 51 words
The method in accordance with claim 1, wherein the step of forming the first and second type electrodes comprises the steps of forming a photoresist film pattern on the polysilicon film, and selectively removing the polysilicon film under the condition in which the photoresist film pattern is used as a mask.
Claim 16
Dependent Claim 19 words
The method in accordance with claim 1, wherein the second impurity ions having the first type conductivity are arsenic-ions.
Claim 17
Dependent Claim 31 words
The method in accordance with claim 1, further comprising the step of forming side wall oxide films on opposite side walls of the first and second conductive type gate electrodes, respectively.
Claim 18
Dependent Claim 29 words
The method in accordance with claim 1, wherein the first conductive type well is a n type well and the second conductive type well is a p type well.
Claim 19
Dependent Claim 44 words
The method in accordance with claim 1, further comprising the step of sequentially forming first and second interlayer insulating films over the entire exposed upper surface of the resulting structure obtained after the implantation of the second impurity ions having the first type conductivity.
Claim 20
Dependent Claim 38 words
The method in accordance with claim 18, further comprising the step of annealing the resulting structure is carried out at a temperature of about 800° to 850° C. in a nitrogen atmosphere for about 30 to 60 minutes.
Claim 21
Independent Claim 304 words
A method for fabricating a semiconductor device comprising the steps of: providing a semiconductor substrate formed with n and p type wells and element-isolating films; forming gate oxide films on the n and p type wells, respectively; forming a polysilicon film over the entire exposed upper surface of the resulting structure obtained after the formation of the gate oxide films; forming a first photoresist film pattern on a portion of the polysilicon film disposed over the n type well; implanting first impurity ions having an n type conductivity in a portion of the polysilicon film disposed over the p type well by use of the first photoresist film pattern as a mask; removing the first photoresist film pattern, and forming a second photoresist film pattern on the portion of the polysilicon film disposed over the p type well; implanting first impurity ions having a p type conductivity in the portion of the polysilicon film disposed over the n type well by use of the second photoresist film pattern as a mask; removing the second photoresist film pattern, and forming a third photoresist film pattern on the portions of the polysilicon film respectively disposed over the n and p type wells; implanting second impurity ions having the p type conductivity in the polysilicon film by use of the third photoresist film pattern as a mask; removing the third photoresist film pattern, and annealing the resulting structure, thereby forming p + source/drain in the n type well; selectively removing the polysilicon film, thereby forming n and p type gate electrodes; forming a fourth photoresist film pattern on the exposed surface of the gate oxide film disposed over the n type well; and implanting second impurity ions having the n type conductivity in an exposed surface portion of the p type well, thereby forming n + source/drain.
Claim 22
Independent Claim 304 words
A method for fabricating a semiconductor device comprising the steps of: providing a semiconductor substrate formed with n and p type wells and element-isolating films; forming gate oxide films on the n and p type wells, respectively; forming a polysilicon film over the entire exposed upper surface of the resulting structure obtained after the formation of the gate oxide films; forming a first photoresist film pattern on a portion of the polysilicon film disposed over the n type well; implanting first impurity ions having an n type conductivity in a portion of the polysilicon film disposed over the p type well by use of the first photoresist film pattern as a mask; removing the first photoresist film pattern, and forming a second photoresist film pattern on the portion of the polysilicon film disposed over the p type well; implanting first impurity ions having a p type conductivity in the portion of the polysilicon film disposed over the n type well by use of the second photoresist film pattern as a mask; removing the second photoresist film pattern, and forming a third photoresist film pattern on the portions of the polysilicon film respectively disposed over the n and p type wells; implanting second impurity ions having the p type conductivity in the polysilicon film by use of the third photoresist film pattern as a mask; removing the third photoresist film pattern, and annealing the resulting structure, thereby forming p + source/drain in the n type well; selectively removing the polysilicon film, thereby forming n and p type gate electrodes; forming a fourth photoresist film pattern on the exposed surface of the gate oxide film disposed over the n type well; and implanting second impurity ions having the n type conductivity in an exposed surface portion of the p type well, thereby forming n + source/drain.

References Cited (Backward Citations)

US4786611A Cited
US4948745A Cited
US5464789A Cited
US5387552A Cited
US5399506A Cited
US5413945A Cited
US5432105A Cited
US5504031A Cited

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