US5683908A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of fabricating trench isolation structure having tapered opening
Assignee: Toshiba Corp
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Filing: 1996-08-30
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Granted: 1997-11-04
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Expires: 2016-08-30
Abstract
Abstract A device-isolating trench having a taper at its upper portion is formed in a silicon semiconductor substrate. Then, a silicon oxide film is formed on the inner wall of the trench and the surface of the semiconductor substrate near the trench by an oxidizing method, and polycrystalline silicon is buried in the trench.
Inventors
- 👤 Naoto Miyashita
- 👤 Koichi Takahashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 21:10
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/69; H10P50/691; H10P50/693; H10P50/694; H10P50/60; H10P50/64; H10P50/642; H10P50/644; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/0145; H10W10/0147; H10W10/10; H10W10/17; Y; Y10; Y10S; Y10S438/00; Y10S438/978
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
103 words
A method of fabricating a semiconductor device comprising the steps of: etching a semiconductor substrate with an isotropic etching method using wet etching to form a trench; tapering said semiconductor substrate at an upper portion of said trench with an anisotropic etching method using a wet etching method involving a KOH solution; etching said semiconductor substrate to deepen said trench with anisotropic etching using reactive ion etching; forming an oxide film on an inner wall of said deepened trench and a surface of said semiconductor substrate adjacent to said deepened trench by an oxidizing method; and burying polycrystalline silicon in said deepened trench.
Claim 2
Independent Claim
103 words
A method of fabricating a semiconductor device comprising the steps of: etching a semiconductor substrate with an isotropic etching method using wet etching to form a trench; tapering said semiconductor substrate at an upper portion of said trench with an anisotropic etching method using a wet etching method involving a KOH solution; etching said semiconductor substrate to deepen said trench with anisotropic etching using reactive ion etching; forming an oxide film on an inner wall of said deepened trench and a surface of said semiconductor substrate adjacent to said deepened trench by an oxidizing method; and burying polycrystalline silicon in said deepened trench.
Claim 3
Dependent Claim
34 words
A method according to claim 1, wherein said deepened trench is formed at least 10 times as deep as said trench etched into the semiconductor substrate with an isotropic etching method using wet etching.
Claim 4
Dependent Claim
30 words
A method according to claim 1, wherein said trench etched into the semiconductor substrate with an isotropic etching method using wet etching is formed 0.5 micro meters deep or shallower.
Claim 5
Dependent Claim
18 words
A method according to claim 1, wherein said deepened trench is formed at least 5 micro meters deep.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-11-03 | 2001-05-05 | 2001-11-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-11-03 | 2005-05-05 | 2005-11-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-11-03 | 2009-05-05 | 2009-11-04 | $7700.00 | Window Closed / Lapsed |