Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
109 words
A semiconductor device comprising: power supply contacts for a supply voltage contact and a ground; a primary group of semiconductor regions, comprising a number of symmetrically paired insulated-gate field-effect semiconductor elements, each having a source region, a drain region, and an insulated-gate electrode between the source and drain regions, circuitwise-symmetrically arranged; a secondary group of semiconductor regions having conductivity opposite that of their relevant source region or drain region, symmetrically formed adjacent to the source and drain regions; and a group of corresponding zener diodes, formed between corresponding semiconductor regions of the primary and secondary groups, for symmetrically coupling the source and drain regions to corresponding power supply contacts.
Claim 2
Dependent Claim
109 words
A semiconductor device comprising: power supply contacts for a supply voltage contact and a ground; a primary group of semiconductor regions, comprising a number of symmetrically paired insulated-gate field-effect semiconductor elements, each having a source region, a drain region, and an insulated-gate electrode between the source and drain regions, circuitwise-symmetrically arranged; a secondary group of semiconductor regions having conductivity opposite that of their relevant source region or drain region, symmetrically formed adjacent to the source and drain regions; and a group of corresponding zener diodes, formed between corresponding semiconductor regions of the primary and secondary groups, for symmetrically coupling the source and drain regions to corresponding power supply contacts.
Claim 3
Dependent Claim
41 words
The semiconductor device of claim 9 wherein a latch-type static memory cell is formed, and in which zener diodes are formed in the source regions of the paired insulated-gate field-effect semiconductor elements that form the cell latch of this memory cell.
Claim 4
Dependent Claim
147 words
In a latch-type circuit having a voltage supply electrode; a semiconductor substrate; first and second identical FETs formed on the substrate, each having a source, a drain, and a gate, symmetrically disposed in the latch-type circuit; a silicide layer coupling the first FET's source to the voltage supply electrode via a Schottky barrier; and a circuit substrate contact of conductivity opposite that of the sources, formed on the substrate adjacent the first FET's source and coupled to the voltage supply electrode; the circuit substrate contact forming a zener diode with the first FET's source which introduces circuit asymmetry between the first and second FETs; the improvement comprising a balancing substrate contact of conductivity opposite that of the sources, formed on the substrate adjacent the second FET's source to make a zener diode with the second FET's source, coupled to the voltage supply electrode, thereby restoring circuit symmetry.
Claim 5
Dependent Claim
147 words
In a latch-type circuit having a voltage supply electrode; a semiconductor substrate; first and second identical FETs formed on the substrate, each having a source, a drain, and a gate, symmetrically disposed in the latch-type circuit; a silicide layer coupling the first FET's source to the voltage supply electrode via a Schottky barrier; and a circuit substrate contact of conductivity opposite that of the sources, formed on the substrate adjacent the first FET's source and coupled to the voltage supply electrode; the circuit substrate contact forming a zener diode with the first FET's source which introduces circuit asymmetry between the first and second FETs; the improvement comprising a balancing substrate contact of conductivity opposite that of the sources, formed on the substrate adjacent the second FET's source to make a zener diode with the second FET's source, coupled to the voltage supply electrode, thereby restoring circuit symmetry.
Claim 6
Dependent Claim
12 words
The circuit of claim 3 wherein the latch-type circuit comprises a tip-flop.
Claim 7
Dependent Claim
12 words
The circuit of claim 3 wherein the circuit is a memory cell.
Claim 8
Dependent Claim
11 words
The circuit of claim 4 wherein the circuit is an SRAM.