Patent EP0376802A1 successfully refreshed from Google Patents.
Patent US5654897A successfully refreshed from Google Patents.
US5654897A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and structure for improving patterning design for processing
Assignee: LSI Corp
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Filing: 1995-12-05
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Granted: 1997-08-05
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Expires: 2015-12-05
Abstract
Abstract A method of interactive feedback in semiconductor processing is provided which compensates for lithographic proximity effects, reactive ion etch loading effects, electromigration and stress due to layering.
Inventors
- 👤 Prabhakar P. Tripathi
- 👤 Bruce Whitefield
- 👤 Chi-Hung Wang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 23:39
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/39; G06F30/398; H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/071; H10W20/081; H10W20/089; H10W20/092; H10W20/40
Claims Analysis
Total Claims: 33
Claim 1
Independent Claim
141 words
A method of forming a metallization pattern on a semiconductor chip, comprising the steps of: (a) designing a metallization pattern including a plurality of working lines having different spacings therebetween; (b) computing a surface area of said metallization pattern; (c) comparing said surface area with a predetermined surface area range; (d) if said surface area is not within said surface area range, modifying said metallization pattern by selectively revising wiring relationships within said metallization pattern and repeating steps (b) and (c) until said surface area is within said surface area range; (e) forming a metal layer on the semiconductor chip; and (f) processing said metal layer by selectively removing portions of said metal layer to form said metallization pattern on the semiconductor chip; in which said surface area range is predetermined such that said processing in step (f) occurs substantially homogeneously.
Claim 2
Independent Claim
141 words
A method of forming a metallization pattern on a semiconductor chip, comprising the steps of: (a) designing a metallization pattern including a plurality of working lines having different spacings therebetween; (b) computing a surface area of said metallization pattern; (c) comparing said surface area with a predetermined surface area range; (d) if said surface area is not within said surface area range, modifying said metallization pattern by selectively revising wiring relationships within said metallization pattern and repeating steps (b) and (c) until said surface area is within said surface area range; (e) forming a metal layer on the semiconductor chip; and (f) processing said metal layer by selectively removing portions of said metal layer to form said metallization pattern on the semiconductor chip; in which said surface area range is predetermined such that said processing in step (f) occurs substantially homogeneously.
Claim 3
Dependent Claim
34 words
A method as in claim 1, in which: said processing in step (f) comprises dry etching; and said surface area ranges is approximately 17% to 100% of a surface area of the semiconductor chip.
Claim 4
Dependent Claim
17 words
A method as in claim 1, in which said processing in step (f) comprises reactive ion etching.
Claim 5
Dependent Claim
25 words
A method as in claim 3, in which said surface area range is approximately 17% to 100% of a surface area of the semiconductor chip.
Claim 6
Dependent Claim
33 words
A method as in claim 1, in which: said processing in step (f) comprises dry etching; and said surface area range is predetermined such that said processing in step (f) occurs substantially anisotropically.
Claim 7
Dependent Claim
34 words
A method as in claim 1, in which: said processing in step (f) comprises reactive ion etching; and said surface area range is predetermined such that said processing in step (f) occurs substantially anisotropically.
Claim 8
Dependent Claim
46 words
A method as in claim 1, in which: said surface area range is between a predetermined value and 100% of a surface area of the semiconductor chip; and step (d) comprises adding dummy lines that are not connected to said working lines to said metallization pattern.
Claim 9
Dependent Claim
78 words
A method as in claim 1, wherein selectively revising wiring relationships comprises: (d1) initializing a mesh pattern of local wires with physical wires; (d2) removing any overlap between said local and said physical wires; (d3) removing portions of said local wires which are within a first predetermined distance of said physical wires; (d4) creating a boundary of a second predetermined distance surrounding said physical wires; and (d5) removing segments of said local wires which are outside are boundary.
Claim 10
Dependent Claim
64 words
A method as in claim 1, wherein selectively revising wiring relationships comprises: (d1) initializing a wiring pattern; (d2) removing portions of said wiring pattern and wires located within said metallization pattern according to a predetermined criteria; (d3) creating a boundary of a predetermined distance surrounding said wires within said metallization pattern; and (d4) removing segments of said wiring pattern which are outside said boundary.
Claim 11
Independent Claim
109 words
A method of forming a metallization pattern on a semiconductor chip, comprising the steps of: (a) designing a metallization pattern including a plurality of lines having different spacings therebetween, and a surface area within a predetermined surface area range; (b) selectively revising object relationships within said metallization pattern if said surface area is not within said surface area range; (c) forming a metal layer on the semiconductor chip; and (d) processing said metal layer by selectively removing portions of said metal layer to form said metallization pattern on the semiconductor chip; in which said surface area range is predetermined such that said processing in step (d) occurs substantially homogeneously.
Claim 12
Independent Claim
109 words
A method of forming a metallization pattern on a semiconductor chip, comprising the steps of: (a) designing a metallization pattern including a plurality of lines having different spacings therebetween, and a surface area within a predetermined surface area range; (b) selectively revising object relationships within said metallization pattern if said surface area is not within said surface area range; (c) forming a metal layer on the semiconductor chip; and (d) processing said metal layer by selectively removing portions of said metal layer to form said metallization pattern on the semiconductor chip; in which said surface area range is predetermined such that said processing in step (d) occurs substantially homogeneously.
Claim 13
Dependent Claim
34 words
A method as in claim 10, in which: said processing in step (c) comprises dry etching; and said surface area range is approximately 17% to 100% of a surface area of the semiconductor chip.
Claim 14
Dependent Claim
17 words
A method as in claim 10, in which said processing in step (f) comprises reactive ion etching.
Claim 15
Dependent Claim
25 words
A method as in claim 12, in which said surface area range is approximately 17% to 100% of a surface area of the semiconductor chip.
Claim 16
Dependent Claim
35 words
A method as in claim 10, in which: said processing in step (c) comprises dry etching; and in which said surface area range is predetermined such that said processing in step (c) occurs substantially anisotropically.
Claim 17
Dependent Claim
36 words
A method as in claim 10, in which: said processing in step (c) comprises reactive ion etching; and in which said surface area range is predetermined such that said processing in step (c) occurs substantially anisotropically.
Claim 18
Dependent Claim
78 words
A method as in claim 10, wherein said selectively revising step comprises: (b1) initializing a mesh pattern of local wires with physical wires; (b2) removing an overlap between said local and said physical wires; (b3) removing portions of said local wires which are within a first predetermined distance of said physical wires; (b4) creating a boundary of a second predetermined distance surrounding said physical wires; and (b5) removing segments of said local wires which are outside said boundary.
Claim 19
Dependent Claim
64 words
A method as in claim 10, wherein selectively revising wiring relationships comprises: (b1) initializing a wiring pattern; (b2) removing portions of said wiring pattern and wires located within said metallization pattern according to a predetermined criteria; (b3) creating a boundary of a predetermined distance surrounding said wires within said metallization pattern; and (b4) removing segments of said wiring pattern which are outside said boundary.
Claim 20
Independent Claim
113 words
A method of forming a metallization pattern on a semiconductor chip, comprising the steps of: (a) designing a metallization pattern including a plurality of lines such that different areas of the semiconductor chip have different densities of said lines, with all of said densities being within a predetermined density range; (b) selectively revising wiring relationships within said metallization pattern based on a predetermined standard; (c) forming a metal layer on the semiconductor chip; and (d) processing said metal layer by selectively removing portions of said metal layer to form said metallization pattern on the semiconductor chip; in which said density range is predetermined such that said processing in step (d) occurs substantially homogeneously.
Claim 21
Independent Claim
113 words
A method of forming a metallization pattern on a semiconductor chip, comprising the steps of: (a) designing a metallization pattern including a plurality of lines such that different areas of the semiconductor chip have different densities of said lines, with all of said densities being within a predetermined density range; (b) selectively revising wiring relationships within said metallization pattern based on a predetermined standard; (c) forming a metal layer on the semiconductor chip; and (d) processing said metal layer by selectively removing portions of said metal layer to form said metallization pattern on the semiconductor chip; in which said density range is predetermined such that said processing in step (d) occurs substantially homogeneously.
Claim 22
Dependent Claim
34 words
A method as in claim 18, in which: said processing in step (c) comprises dry etching; and in which said density range is predetermined such that said processing in step (c) occurs substantially anisotropically.
Claim 23
Dependent Claim
35 words
A method as in claim 18, in which: said processing in step (c) comprises reactive ion etching; and in which said density range is predetermined such that said processing in step (c) occurs substantially anisotropically.
Claim 24
Dependent Claim
36 words
A method as in claim 18, wherein said metallization pattern further comprises a surface area within a predetermined surface area range, and said predetermined standard comprises said surface area not being within said surface area range.
Claim 25
Dependent Claim
78 words
A method as in claim 18, wherein said selectively revising step comprises: (b1) initializing a mesh pattern of local wires with physical wires; (b2) removing any overlap between said local and said physical wires; (b3) removing portions of said local wires which are within a first predetermined distance of said physical wires; (b4) creating a boundary of a second predetermined distance surrounding said physical wires; and (b5) removing segments of said local wires which are outside said boundary.
Claim 26
Dependent Claim
64 words
A method as in claim 18, wherein selectively revising wiring relationships comprises: (b1) initializing a wiring pattern; (b2) removing portions of said wiring pattern and wires located within said metallization pattern according to a predetermined criteria; (b3) creating a boundary of a predetermined distance surrounding said wires within said metallization pattern; and (b4) removing segments of said wiring pattern which are outside said boundary.
Claim 27
Independent Claim
89 words
A method of forming a metallization pattern on a semiconductor chip, comprising the steps of: (a) designing a metallization pattern including a plurality of lines that have different widths, with all of said widths being within a predetermined width range; (b) forming a metal layer on the semiconductor chip; and (c) processing said metal layer by selectively removing portions of said metal layer to form said metallization pattern on the semiconductor chip; in which said width range is predetermined such that said processing in step (c) occurs substantially homogeneously.
Claim 28
Independent Claim
89 words
A method of forming a metallization pattern on a semiconductor chip, comprising the steps of: (a) designing a metallization pattern including a plurality of lines that have different widths, with all of said widths being within a predetermined width range; (b) forming a metal layer on the semiconductor chip; and (c) processing said metal layer by selectively removing portions of said metal layer to form said metallization pattern on the semiconductor chip; in which said width range is predetermined such that said processing in step (c) occurs substantially homogeneously.
Claim 29
Dependent Claim
34 words
A method as in claim 24, in which: said processing in step (c) comprises dry etching; and in which said width range is predetermined such that said processing in step (c) occurs substantially anisotropically.
Claim 30
Dependent Claim
35 words
A method as in claim 24, in which: said processing in step (c) comprises reactive ion etching; and in which said width range is predetermined such that said processing in step (c) occurs substantially anisotropically.
Claim 31
Dependent Claim
63 words
A method as in claim 24, further comprising the steps of: computing a surface area of said metallization pattern; comparing said surface area with a predetermined surface area range; and selectively revising wiring relationships within said metallization pattern if said surface area is not within said surface area range; wherein said computing, comparing, and selectively modifying steps precede said metal layer forming step.
Claim 32
Dependent Claim
73 words
A method as in claim 27, wherein selectively revising wiring relationships comprises: initializing a mesh pattern of local wires with physical wires; removing any overlap between said local and said physical wires; removing portions of said local wires which are within a first predetermined distance of said physical wires; creating a boundary of a second predetermined distance surrounding said physical wires; and removing segments of said local wires which are outside said boundary.
Claim 33
Dependent Claim
60 words
A method as in claim 27, wherein selectively revising wiring relationships comprises: initializing a wiring pattern; removing portions of said wiring pattern and wires located within said metallization pattern according to a predetermined criteria; creating a boundary of a predetermined distance surrounding said wires within said metallization pattern; and removing segments of said wiring pattern which are outside said boundary.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-08-04 | 2001-02-03 | 2001-08-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-08-04 | 2005-02-03 | 2005-08-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-08-04 | 2009-02-03 | 2009-08-05 | $7700.00 | Window Closed / Lapsed |