Circuit wafer and TEG test pad electrode

Claim 1

A circuit wafer, testable with a probe of tip diameter r and diceable with a cutting tool of cutting width bb, comprising: a semiconductor wafer providing a semiconductor substrate, portions of which are covered with an insulating film; a plurality of circuits formed on the substrate, each coupled to bump electrodes having a top surface at a height d above the substrate's insulating film; a plurality of scribe lines, of a width w greater than bb, traversing the semiconductor wafer between the circuits to provide scribe lanes of width w where the cutting tool can cut the circuit wafer into individual circuit chips; and a plurality of test circuits, formed in the scribe lanes, having test elements connected to test pad electrodes; the test pad electrodes having a general longitudinal dimension t along the scribe lane greater than both height d and probe tip diameter p and comprising a first portion of longitudinal dimension about t, formed in the scribe lane so as be entirely cut away by the cutting tool during dicing, and a second portion of longitudinal dimension about t, formed in the scribe lane so as be cut by the cutting tool during dicing into pieces smaller than d.