US5644729A
Expired / Lapsed
US
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Bidirectional data buffer for a bus-to-bus interface unit in a computer system
Assignee: International Business Machines Corp
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Filing: 1994-07-28
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Granted: 1997-07-01
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Expires: 2014-07-28
Abstract
Abstract A method and system are provided for controlling data transfer between a system memory connected to a system bus and at least one input/output (I/O) device connected to an I/O bus in a computer system. The system bus is coupled to the I/O bus by a bus interface unit comprising a first pair of buffers connected in series between the I/O bus and the system bus, and a second pair of buffers connected in series between the I/O bus and the system bus and in parallel with the first pair of buffers. Each of the buffers in each of the pairs is used for bidirectional data transfer between the system bus and the I/O bus.
Inventors
- 👤 Nader Amini
- 👤 Bechara Fouad Boury
- 👤 Sherwood Brannon
- 👤 Richard Louis Horne
- 👤 Terence Joseph Lohman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 06:50
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F13/00; G06F13/14; G06F13/16; G06F13/1668; G06F13/1673; G06F13/38; G06F13/40; G06F13/4004; G06F13/4027; G06F13/405; G06F13/4059
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
385 words
A computer system, comprising: system memory; a memory controller for controlling access to system memory, said system memory and said memory controller connected by a memory bus; a central processing unit coupled to said memory controller through a local bus, said central processing unit being connected to read data from and write data to said system memory over said local bus and said memory bus by performing read and write operations; a bus interface unit connected with said memory controller by a system bus; at least one input/output (I/O) device connected to said bus interface unit by an I/O bus for reading data from and writing data to said system memory over said bus interface unit; said bus interface unit including a bidirectional data storage unit to provide temporary storage of data being transferred between said system bus and said I/O bus during read and write operations performed by said at least one I/O device, said bidirectional storage unit comprising (i) a first pair of buffers connected in series between said I/O bus and said system bus, and (ii) a second pair of buffers connected in series between said I/O bus and said system bus and in parallel with said first pair of buffers, each of said buffers in each of said pairs being used for bidirectional data transfer between said system bus and said I/O bus wherein first and second sets of data originating on either one of said system bus or said I/O bus and destined for transfer in one direction to the other one of said system bus or said I/O bus are transferred to the bidirectional storage unit so that (a) said first set of data is stored in one buffer of one of the pairs of series-connected buffers, and (b) (1) said stored first set of data contained in said one buffer of one of the pairs of series-connected buffers is transferred to the other buffer in said one of the pairs while, simultaneously, (b) (2) said second set of data is transferred into one buffer of the other series-connected pair of buffers; wherein one of said first pair of buffers and one of said second pair of buffers is connected to said system bus, each of said system-bus connected buffers capable of simultaneously transferring data over said system bus.
Claim 2
Dependent Claim
385 words
A computer system, comprising: system memory; a memory controller for controlling access to system memory, said system memory and said memory controller connected by a memory bus; a central processing unit coupled to said memory controller through a local bus, said central processing unit being connected to read data from and write data to said system memory over said local bus and said memory bus by performing read and write operations; a bus interface unit connected with said memory controller by a system bus; at least one input/output (I/O) device connected to said bus interface unit by an I/O bus for reading data from and writing data to said system memory over said bus interface unit; said bus interface unit including a bidirectional data storage unit to provide temporary storage of data being transferred between said system bus and said I/O bus during read and write operations performed by said at least one I/O device, said bidirectional storage unit comprising (i) a first pair of buffers connected in series between said I/O bus and said system bus, and (ii) a second pair of buffers connected in series between said I/O bus and said system bus and in parallel with said first pair of buffers, each of said buffers in each of said pairs being used for bidirectional data transfer between said system bus and said I/O bus wherein first and second sets of data originating on either one of said system bus or said I/O bus and destined for transfer in one direction to the other one of said system bus or said I/O bus are transferred to the bidirectional storage unit so that (a) said first set of data is stored in one buffer of one of the pairs of series-connected buffers, and (b) (1) said stored first set of data contained in said one buffer of one of the pairs of series-connected buffers is transferred to the other buffer in said one of the pairs while, simultaneously, (b) (2) said second set of data is transferred into one buffer of the other series-connected pair of buffers; wherein one of said first pair of buffers and one of said second pair of buffers is connected to said system bus, each of said system-bus connected buffers capable of simultaneously transferring data over said system bus.
Claim 3
Dependent Claim
44 words
The computer system of claim 1, wherein said at least one I/O device comprises a plurality of I/O devices and wherein data is transferred between each of said plurality of I/O devices and said bidirectional storage unit over said I/O bus at different bandwidths.
Claim 4
Dependent Claim
16 words
The computer system of claim 1 wherein each pair of buffers stores thirty-two bytes of data.
Claim 5
Dependent Claim
23 words
The computer system of claim 3 wherein each of said thirty-two byte pair of buffers includes two sixteen byte buffers connected in series.
Claim 6
Dependent Claim
39 words
The computer system of claim 1 wherein said buffers are configured to read and write over said I/O bus at a speed at which said I/O device operates and over said system bus at a given data burst speed.
Claim 7
Independent Claim
275 words
A method of controlling data transfer between a system memory connected to a system bus and at least one input/output (I/O) device connected to an I/O bus in a computer system, wherein said system bus is coupled to said I/O bus by a bus interface unit comprising a first pair of buffers connected in series between said I/O bus and said system bus, and a second pair of buffers connected in series between said I/O bus and said system bus and in parallel with said first pair of buffers, the method comprising the steps of: transferring first and second sets of data originating on said I/O bus and destined for transfer in one direction to said system bus across said bus interface unit by: (a) temporarily storing said first set of data in one buffer of one of the pairs of series-connected buffers; simultaneously, (b) (1) transferring said stored first set of data contained in said one buffer of one of the pairs of series-connected buffers to the other buffer in said one of the pairs; and (b) (2) transferring said second set of data into one buffer of the other series-connected pair of buffers; (c) transferring said second set of data from said one buffer of said other series-connected pair of buffers to the other buffer of said other series-connected pair of buffers; and (d) (1) transferring said first set of data over said system bus from said other buffer in said one of the pairs of series-connected buffers while simultaneously (d) (2) transferring said second set of data over said system bus from said other buffer of said other series-connected pair of buffers.
Claim 8
Independent Claim
275 words
A method of controlling data transfer between a system memory connected to a system bus and at least one input/output (I/O) device connected to an I/O bus in a computer system, wherein said system bus is coupled to said I/O bus by a bus interface unit comprising a first pair of buffers connected in series between said I/O bus and said system bus, and a second pair of buffers connected in series between said I/O bus and said system bus and in parallel with said first pair of buffers, the method comprising the steps of: transferring first and second sets of data originating on said I/O bus and destined for transfer in one direction to said system bus across said bus interface unit by: (a) temporarily storing said first set of data in one buffer of one of the pairs of series-connected buffers; simultaneously, (b) (1) transferring said stored first set of data contained in said one buffer of one of the pairs of series-connected buffers to the other buffer in said one of the pairs; and (b) (2) transferring said second set of data into one buffer of the other series-connected pair of buffers; (c) transferring said second set of data from said one buffer of said other series-connected pair of buffers to the other buffer of said other series-connected pair of buffers; and (d) (1) transferring said first set of data over said system bus from said other buffer in said one of the pairs of series-connected buffers while simultaneously (d) (2) transferring said second set of data over said system bus from said other buffer of said other series-connected pair of buffers.
Claim 9
Dependent Claim
41 words
The method of claim 6, wherein said at least one I/O device comprises a plurality of I/O devices and wherein data is transferred between each of said I/O devices and said bus interface unit over said I/O bus at different bandwidths.
Claim 10
Dependent Claim
39 words
The method of claim 6, wherein said buffers are configured to read and write over said I/O bus at a speed at which said selected I/O device operates and over said system bus at a given data burst speed.
Claim 11
Dependent Claim
56 words
The method of claim 6, wherein said system bus transfers read or write data between said bus interface unit and said system bus in bandwidths of up to 16 bytes, and wherein said I/O bus transfers read or write data between said input/output device and said bus interface unit in bandwidths of up to four bytes.
Claim 12
Dependent Claim
22 words
The method of claim 6, wherein data is passed through said buffers in said bus interface unit in a first-in, first-out procedure.
Claim 13
Dependent Claim
35 words
The method of claim 6, wherein each of said buffers in each of said buffers pairs in said bus interface unit is used for bidiredtional data transfer between said system bus and said I/O bus.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-06-30 | 2000-12-30 | 2001-07-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-06-30 | 2004-12-30 | 2005-07-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-06-30 | 2008-12-30 | 2009-07-01 | $7700.00 | Window Closed / Lapsed |