Patent US5627400A successfully refreshed from Google Patents.
US5627400A
Expired / Lapsed
US
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Semiconductor memory device
Assignee: PS4 Luxco SARL
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Filing: 1995-07-31
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Granted: 1997-05-06
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Expires: 2015-07-31
Abstract
Abstract A semiconductor memory device including (a) a plug buried in a contact hole formed through an upper insulative layer and/or a contact hole formed through upper and lower insulative layers, the plug comprising a metal having a high melting point, (b) a fuse formed in a channel formed through the upper insulative layer, the fuse comprising the same material as that of the plug, and (c) an interconnection layer formed on the upper insulative layer and connected to the plug and opposite ends of the fuse. In the semiconductor memory device, a metal layer, comprising a metal having a high melting point and formed simultaneously with the plug to fill a contact hole therewith, works as a fuse. Thus, it is possible to obtain a low-resistive fuse without increasing the number of fabrication steps relative to the prior art, resulting in higher speed operation of a memory device without cost increase.
Inventors
- 👤 Hiroki Koga
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 11:10
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/834; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/493; H10B; H10B20/00; H10B20/20; H10B20/25; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0144
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
106 words
A semiconductor memory device wherein a defective bit cell can be substituted with a redundant bit cell by breaking a fuse, said semiconductor memory device comprising: an upper insulative layer having an upper and a lower surface; a plug formed in a contact hole formed through said upper insulative layer, said plug comprising a metal having a high melting point; a fuse formed in a channel formed in the upper surface of said upper insulative layer, said fuse comprising the same material as said plug; and an interconnection layer formed on said upper insulative layer and connected to said plug and opposite ends of said fuse.
Claim 2
Dependent Claim
106 words
A semiconductor memory device wherein a defective bit cell can be substituted with a redundant bit cell by breaking a fuse, said semiconductor memory device comprising: an upper insulative layer having an upper and a lower surface; a plug formed in a contact hole formed through said upper insulative layer, said plug comprising a metal having a high melting point; a fuse formed in a channel formed in the upper surface of said upper insulative layer, said fuse comprising the same material as said plug; and an interconnection layer formed on said upper insulative layer and connected to said plug and opposite ends of said fuse.
Claim 3
Dependent Claim
31 words
The semiconductor memory device as recited in claim 1, wherein said metal having a high melting point comprises at least one of: tungsten (W), molybdenum (Mo), chromium (Cr) and vanadium (V).
Claim 4
Dependent Claim
32 words
The semiconductor memory device as recited in claim 1 further comprising an electrically conductive layer disposed beneath said fuse, said conductive layer serving as an etching stopper while said channel is formed.
Claim 5
Dependent Claim
42 words
The semiconductor memory device as recited in claim 3, further comprising a lower insulative layer, wherein said conductive layer comprises the same material as at least one of an electrode and an interconnection layer to be formed on said lower insulative layer.
Claim 6
Dependent Claim
24 words
The semiconductor memory device as recited in claim 4, wherein said upper and lower insulative layers comprise of boron phosphorus silicic acid glass (BPSG).
Claim 7
Dependent Claim
31 words
The semiconductor memory device as recited in claim 3, wherein said electrically conductive layer comprises at least one of: (a) polysilicon and (b) silicide of metal having a high melting point.
Claim 8
Dependent Claim
15 words
The semiconductor memory device as recited in claim 1, wherein said interconnection layer comprises aluminum.
Claim 9
Dependent Claim
47 words
The semiconductor memory device as recited in claim 1 further comprising a barrier layer disposed between said upper insulative layer and said interconnection layer and also between said fuse and said interconnection layer and further between said plug and said interconnection layer, said barrier layer comprising metal.
Claim 10
Dependent Claim
21 words
The semiconductor memory device as recited in claim 8, wherein said barrier layer comprises at least one of: Ti and TiN.
Claim 11
Dependent Claim
117 words
A semiconductor memory device wherein a defective bit cell can be substituted with a redundant bit cell by breaking a fuse, said semiconductor memory device comprising: an upper insulative layer having an upper and a lower surface; a plug formed in a contact hole formed through said upper insulative layer, said plug comprising metal having a high melting point; a fuse formed in a channel formed in the upper surface of said upper insulative layer, said fuse comprising the same material as said plug; a barrier layer disposed beneath said fuse, said barrier layer comprising metal; and an interconnection layer formed on said upper insulative layer and connected to said plug and opposite ends of said fuse.
Claim 12
Dependent Claim
117 words
A semiconductor memory device wherein a defective bit cell can be substituted with a redundant bit cell by breaking a fuse, said semiconductor memory device comprising: an upper insulative layer having an upper and a lower surface; a plug formed in a contact hole formed through said upper insulative layer, said plug comprising metal having a high melting point; a fuse formed in a channel formed in the upper surface of said upper insulative layer, said fuse comprising the same material as said plug; a barrier layer disposed beneath said fuse, said barrier layer comprising metal; and an interconnection layer formed on said upper insulative layer and connected to said plug and opposite ends of said fuse.
Claim 13
Dependent Claim
21 words
The semiconductor memory device as recited in claim 10, wherein said barrier layer comprises at least one of: Ti and TiN.
Claim 14
Dependent Claim
25 words
The semiconductor memory device as recited in claim 10 further comprising a second barrier layer disposed along the lower and side periphery of said plug.
Claim 15
Dependent Claim
22 words
The semiconductor memory device as recited in claim 12, wherein said second barrier layer comprises the same material as said barrier layer.
Claim 16
Dependent Claim
24 words
The semiconductor memory device as retired in claim 10, wherein said barrier layer further extends between said upper insulative layer and said interconnection layer.
Claim 17
Dependent Claim
25 words
The semiconductor memory device as recited in claim 12, wherein said second barrier layer further extends between said upper insulative layer and said interconnection layer.
Claim 18
Dependent Claim
30 words
The semiconductor device as recited in claim 10, wherein said metal having a high melting point comprises at least of one: tungsten (W), molybdenum (Mo), chromium (Cr) and vanadium (V).
Claim 19
Dependent Claim
33 words
The semiconductor memory device as recited in claim 10 further comprising art electrically conductive layer disposed beneath said barrier layer, said conductive layer serving as an etching stopper while said channel is formed.
Claim 20
Dependent Claim
42 words
The semiconductor memory device as recited in claim 17, further comprising a lower insulative layer, wherein said conductive layer comprises the same material as at least one of: an electrode and an interconnection layer to be formed on said lower insulative layer.
Claim 21
Dependent Claim
24 words
The semiconductor memory device as recited in claim 10, wherein said upper and lower insulative layers comprise boron phosphorus silicic acid glass (BPSG) layer.
Claim 22
Dependent Claim
31 words
The semiconductor memory device as recited in claim 17, wherein said electrically conductive layer comprises at least one of: (a) polysilicon and (b) silicide of metal having a high melting point.
Claim 23
Dependent Claim
29 words
The semiconductor memory device of claim 1, further comprising a lower insulative layer, wherein said contact hole is formed in said upper insulative layer and said lower insulative layer.
Claim 24
Dependent Claim
44 words
The semiconductor memory device of claim 21, further comprising: an electrically conductive layer disposed beneath said fuse; wherein said conductive layer comprises the same material as at least one of: an electrode and an interconnection layer to be formed on said lower insulative layer.
Claim 25
Dependent Claim
28 words
The semiconductor memory device of claim 22, wherein said electrically conductive layer comprises at least one of: polysilicon and a silicide of metal having a high melting point.
Claim 26
Dependent Claim
29 words
The semiconductor memory device of claim 12, further comprising a lower insulative layer, wherein said contact hole is formed in said upper insulative layer and said lower insulative layer.
Claim 27
Dependent Claim
29 words
The semiconductor memory device of claim 24, wherein said metal having a high melting point comprises at least one of: tungsten (w), molybdenum (Mo), chromium (Cr) and vanadium (V).
Claim 28
Dependent Claim
45 words
The semiconductor memory device of claim 25, further comprising an electrically conductive layer disposed beneath said barrier layer wherein said conductive layer comprises the same material as at least one of an electrode and an interconnection layer to be formed on said lower insulative layer.
References Cited (Backward Citations)
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