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US4792835A Expired / Lapsed US ⏱️ 0.0 years remaining

MOS programmable memories using a metal fuse link and process for making the same

Assignee: UNITED STATES INSTRUMENTS Inc
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Filing: 1986-12-05
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Granted: 1988-12-20
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Expires: 2006-12-05
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Abstract

Abstract A process for making a metal fuse link in a MOS or CMOS process which includes depositing a refractory metal or metal alloy over an already deposited multi-level oxide and patterning the deposited metal or metal alloy so that it has a fusing segment between and integral with expanded segments such that the length and cross sectional area of the fusing segment is sufficiently small so that the fusing current therethrough is less than 20 milliamperes. The fuse and surrounding circuitry is covered with a passivation layer and contacts formed in the passivation layer to the expanded segments.

Inventors

  • 👤 Stephen P. Sacarisen
  • 👤 Gene E. Blankenship
  • 👤 Rajiv R. Shah
  • 👤 Toan Tran
  • 👤 David J. Myers
  • 👤 Johnson J. Lin
  • 👤 Steve Thompson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 09:39
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/493

Claims Analysis

Total Claims: 24
Claim 1
Independent Claim 125 words
A method of making a one time programmable memory element on a face of semiconductor chip in a MOS or CMOS process comprising: forming a multi-level oxide over the face; depositing a layer of refractory metal over said multi-level oxide; patterning and etching the refractory metal so as to form a fusing segment between and integral with spaced apart expanded segments of the metal such that the cross sectional area of the fusing segment is such that the current which melts the fusing segment is less than 25 milliamperes; and depositing over the face a passivating layer of insulating material; forming contact openings to the expanded regions; forming contact openings to other contacts of the chip; and depositing and patterning contact metal over the face.
Claim 2
Independent Claim 125 words
A method of making a one time programmable memory element on a face of semiconductor chip in a MOS or CMOS process comprising: forming a multi-level oxide over the face; depositing a layer of refractory metal over said multi-level oxide; patterning and etching the refractory metal so as to form a fusing segment between and integral with spaced apart expanded segments of the metal such that the cross sectional area of the fusing segment is such that the current which melts the fusing segment is less than 25 milliamperes; and depositing over the face a passivating layer of insulating material; forming contact openings to the expanded regions; forming contact openings to other contacts of the chip; and depositing and patterning contact metal over the face.
Claim 3
Dependent Claim 18 words
A method according to claim 1, wherein the fuse metal is a refractory metal or refractory metal alloy.
Claim 4
Dependent Claim 18 words
A method according to claim 2, wherein the resistance of the fuse segment is less than 200 ohms.
Claim 5
Dependent Claim 13 words
A method according to claim 2, wherein the fuse metal is titanium tungsten.
Claim 6
Dependent Claim 33 words
A method according to claim 4, wherein the thickness of the titanium tungsten is about 450 Angstroms and the width of the fuse segment is in the range of 0.6 to 2.0 microns.
Claim 7
Independent Claim 113 words
A method of forming a metal fuse link on a face of a semiconductor body in a MOS or CMOS process, comprising: forming a multi-level oxide over the face; depositing a refractory metal over said multi-level oxide with a thickness in the range of 400 to 500 Angstroms; patterning the metal so that it forms a length of fusing segment with a width less than 2 microns and a length of less than 3 microns joined at either end by expanded segments of the metal; depositing a passivation layer of insulator over the face; etching contacts in the passivation layer to the expanded segments; etching contacts to the remaining contacts in the circuit.
Claim 8
Independent Claim 113 words
A method of forming a metal fuse link on a face of a semiconductor body in a MOS or CMOS process, comprising: forming a multi-level oxide over the face; depositing a refractory metal over said multi-level oxide with a thickness in the range of 400 to 500 Angstroms; patterning the metal so that it forms a length of fusing segment with a width less than 2 microns and a length of less than 3 microns joined at either end by expanded segments of the metal; depositing a passivation layer of insulator over the face; etching contacts in the passivation layer to the expanded segments; etching contacts to the remaining contacts in the circuit.
Claim 9
Dependent Claim 12 words
A method according to claim 6, wherein the metal is titanium tungsten.
Claim 10
Dependent Claim 104 words
A fuse link in a MOS or CMOS device formed over a face of a semiconductor body, comprising: a layer of multi-level oxide over the face of a semiconductor body; a refractory metal fuse layer formed over a field oxide region of the multi-level oxide having a fuse segment with a resistance less than about 200 ohms integral with and between two spaced apart expanded regions; and an interlevel passivation layer over said fuse layer; an electrical contact integral with the MOS or CMOS device and extending through said passivation layer for contacting said fuse segment and carrying fusing current to said fusing segment.
Claim 11
Dependent Claim 104 words
A fuse link in a MOS or CMOS device formed over a face of a semiconductor body, comprising: a layer of multi-level oxide over the face of a semiconductor body; a refractory metal fuse layer formed over a field oxide region of the multi-level oxide having a fuse segment with a resistance less than about 200 ohms integral with and between two spaced apart expanded regions; and an interlevel passivation layer over said fuse layer; an electrical contact integral with the MOS or CMOS device and extending through said passivation layer for contacting said fuse segment and carrying fusing current to said fusing segment.
Claim 12
Dependent Claim 19 words
The fuse link of claim 8 where the electrical contact is in contact with one of the expanded regions.
Claim 13
Dependent Claim 14 words
The fuse link of claim 8 wherein the metal fuse layer is titanium tungsten.
Claim 14
Dependent Claim 34 words
The fuse link of claim 8 wherein the fuse segment has a cross sectional area of such size to melt the fuse segment when current delivered to said segment is less than 25 milliamps.
Claim 15
Dependent Claim 19 words
The fuse link of claim 8 wherein the fuse segment is electrically connected to said MOS or CMOS device.
Claim 16
Dependent Claim 21 words
The fuse link of claim 12 wherein the fuse segment is in series electrical connection with said MOS or CMOS device.
Claim 17
Dependent Claim 19 words
The fuse link of claim 9 wherein the electrical contact is electrically connected to said MOS or CMOS device.
Claim 18
Dependent Claim 21 words
The fuse link of claim 14 wherein the electrical contact is in series electrical connection with said MOS or CMOS device.
Claim 19
Dependent Claim 21 words
The fuse link of claim 8 wherein the MOS or CMOS device provides the fusing current for melting the fuse segment.
Claim 20
Dependent Claim 112 words
A fuse link in a MOS or CMOS device formed over the face of a semiconductor body, comprising: a current carrying terminal connected to said MOS or CMOS device; a layer of multi-level oxide over the face of a semiconductor; a refractory metal fuse formed over a field oxide region of the multi-level oxide having a fuse segment with a resistance less that 200 ohms intergral with and between two spaced apart expanded regions; an interlevel passivation layer over said fuse; an electrical contact extending through said passivation layer and electrically connected to said current carrying terminal for carrying a fusing current from said MOS or CMOS device to said fuse segment.
Claim 21
Dependent Claim 112 words
A fuse link in a MOS or CMOS device formed over the face of a semiconductor body, comprising: a current carrying terminal connected to said MOS or CMOS device; a layer of multi-level oxide over the face of a semiconductor; a refractory metal fuse formed over a field oxide region of the multi-level oxide having a fuse segment with a resistance less that 200 ohms intergral with and between two spaced apart expanded regions; an interlevel passivation layer over said fuse; an electrical contact extending through said passivation layer and electrically connected to said current carrying terminal for carrying a fusing current from said MOS or CMOS device to said fuse segment.
Claim 22
Dependent Claim 16 words
The fuse link of claim 17 wherein the terminal and the contact are connected in series.
Claim 23
Dependent Claim 15 words
The fuse link of claim 18 wherein the terminal and the contact are integrally formed.
Claim 24
Dependent Claim 13 words
The fuse link of claim 17 wherein the fuse link is titanium tungsten.

References Cited (Backward Citations)

US4536948A Cited
US4420504A Cited
US4628590A Cited
US4647340A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-12-20 1992-06-20 1992-12-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-12-20 1996-06-20 1996-12-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-12-20 2000-06-20 2000-12-20 $7700.00 Window Closed / Lapsed

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