Patent US5621601A successfully refreshed from Google Patents.
US5621601A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Over-current protection apparatus for transistor
Assignee: Fuji Electric Co Ltd
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Filing: 1994-09-28
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Granted: 1997-04-15
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Expires: 2014-09-28
Abstract
Abstract The disclosed invention is designed to prevent the oscillation which often occurs in an over-current protection apparatus for an insulated gate controlled transistor. The apparatus improves the response in current detection, to prevent oscillation, and improves protection speed against over-current. This is accomplished by separating the gates of the main transistor and the current detector transistor; by setting a shorter time constant for the gate circuit of the current detector transistor than that of the gate circuit of the main transistor; by feeding the detection signal obtained from the current detecting means which detects the current i of the current detector transistor proportional to the current I flowing through the main transistor, to the control means; and by controlling the gate potentials of both transistors to protect the main transistor from the over-current by feeding the comparison output Sd from the comparator circuit, which compares the voltage of the signal Vd with the reference voltage Vr, to the control circuit.
Inventors
- 👤 Tatsuhiko Fujihira
- 👤 Shin Kiuchi
- 👤 Kazuhiko Yoshida
- 👤 Yukio Yano
- 👤 Kazunori Oyabe
- 👤 Shoichi Furuhata
- 👤 Tetsuhiro Morimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 15:44
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/08; H03K17/082; H03K17/0822; H03F; H03F1/00; H03F1/52; H03K17/0828; H10; H10D; H10D89/00; H10D89/60
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
197 words
An apparatus for protecting a main transistor from an over-current flowing therethrough, said main transistor having at least a first gate terminal means, said apparatus comprising: a current detector transistor having at least a second gate terminal means, said current detector transistor connected in a parallel fashion to said main transistor, said first gate terminal means connected to said second gate terminal means through selected electrical means; current detecting means for sensing an amount of a current flowing through said current detector transistor and for generating a detection signal indicative of said amount; gate control means responsive to said detection signal for controlling gate potential of said main transistor and that of said current detector transistor when said amount exceeds a predetermined limit; a main transistor gate circuit connecting said gate control means to said first gate terminal means, said main transistor gate circuit having a first time constant associated therewith; and a detector transistor gate circuit connecting said gate control means to said second gate terminal means, said detector transistor gate circuit having a second time constant associated therewith, said electrical means being selected to shorten said second time constant relative to said first time constant.
Claim 2
Independent Claim
197 words
An apparatus for protecting a main transistor from an over-current flowing therethrough, said main transistor having at least a first gate terminal means, said apparatus comprising: a current detector transistor having at least a second gate terminal means, said current detector transistor connected in a parallel fashion to said main transistor, said first gate terminal means connected to said second gate terminal means through selected electrical means; current detecting means for sensing an amount of a current flowing through said current detector transistor and for generating a detection signal indicative of said amount; gate control means responsive to said detection signal for controlling gate potential of said main transistor and that of said current detector transistor when said amount exceeds a predetermined limit; a main transistor gate circuit connecting said gate control means to said first gate terminal means, said main transistor gate circuit having a first time constant associated therewith; and a detector transistor gate circuit connecting said gate control means to said second gate terminal means, said detector transistor gate circuit having a second time constant associated therewith, said electrical means being selected to shorten said second time constant relative to said first time constant.
Claim 3
Dependent Claim
23 words
The apparatus according to claim 1, wherein said second time constant is set at less than one tenth of said first time constant.
Claim 4
Dependent Claim
84 words
The apparatus according to claim 1, wherein said gate control means further comprises a comparator circuit for comparing a voltage value of said detection signal with a predetermined reference voltage value, and for outputting an output signal when said voltage value of said detection signal exceeds said reference voltage value, and a control circuit responsive to said output signal for controlling gate potential of said main transistor and gate potential of said current detector transistor, whereby said main transistor is protected from an over-current.
Claim 5
Dependent Claim
49 words
The apparatus for a transistor according to claim 1, wherein said gate control means further comprises a control transistor operative when a voltage value of said detection signal exceeds a predetermined threshold, whereby the gate potential of said main transistor and that of said current detector transistor are controlled.
Claim 6
Dependent Claim
31 words
The apparatus according to claim 4, further comprising means for setting minimum gate control voltage values for said main transistor and said current detector transistor when said control transistor is operative.
Claim 7
Dependent Claim
57 words
The apparatus according to claim 1, further comprising: a plurality of semiconductor layers, wherein said main transistor and said current detector transistor are disposed side by side; and an insulation film covering portions of a top surface of said layers, at least one of the first and second terminal means extending over part of said insulation film.
Claim 8
Dependent Claim
66 words
The apparatus according to claim 1, further comprising a plurality of semiconductor layers, wherein said main transistor and said current detector transistor are disposed side by side, said layers including a base plate of a first conductivity type, and a stopper layer of a second conductivity type different from said first conductivity type, said stopper layer formed by in-diffusion from a surface of said base plate.
Claim 9
Dependent Claim
215 words
A semiconductor device having a main transistor and a current detector transistor disposed on a common semiconductor substrate having a first principal surface side, the semiconductor device comprising: a common drain region of a first conductivity type formed in the first principal surface side of the substrate; a main-transistor base region and a current-detector-transistor base region formed in a drain surface region of the drain region, the base regions being of second conductivity type; a main-transistor source region and a current-detector-transistor source region formed in a base surface region of the main-transistor base region and the current-detector-transistor base region, respectively, the source regions being of the first conductivity type; a main-transistor gate electrode disposed on an insulation film over the base surface region of the main-transistor base region between the main-transistor source and drain regions, and a current-detector-transistor gate electrode disposed on an insulation film over the base surface region of the current-detector-transistor base region between the current-detector-transistor source and drain regions; a main-transistor source electrode connected to the main-transistor base and source regions, and a current-detector-transistor source electrode connected to the current-detector-transistor base and source regions; wherein the gate electrodes are separated by a gap, and the current-detector-transistor source electrode is disposed on an insulation film, over both gate electrodes and above the gap.
Claim 10
Dependent Claim
215 words
A semiconductor device having a main transistor and a current detector transistor disposed on a common semiconductor substrate having a first principal surface side, the semiconductor device comprising: a common drain region of a first conductivity type formed in the first principal surface side of the substrate; a main-transistor base region and a current-detector-transistor base region formed in a drain surface region of the drain region, the base regions being of second conductivity type; a main-transistor source region and a current-detector-transistor source region formed in a base surface region of the main-transistor base region and the current-detector-transistor base region, respectively, the source regions being of the first conductivity type; a main-transistor gate electrode disposed on an insulation film over the base surface region of the main-transistor base region between the main-transistor source and drain regions, and a current-detector-transistor gate electrode disposed on an insulation film over the base surface region of the current-detector-transistor base region between the current-detector-transistor source and drain regions; a main-transistor source electrode connected to the main-transistor base and source regions, and a current-detector-transistor source electrode connected to the current-detector-transistor base and source regions; wherein the gate electrodes are separated by a gap, and the current-detector-transistor source electrode is disposed on an insulation film, over both gate electrodes and above the gap.
Claim 11
Dependent Claim
216 words
A semiconductor device having a main transistor and a current detector transistor disposed on a common semiconductor substrate having a first principal surface side, the semiconductor device comprising: a common drain region of a first conductivity type formed in the first principal surface side of the substrate; a main-transistor base region and a current-detector-transistor base region formed in a drain surface region of the drain region, the base regions being of second conductivity type; a main-transistor source region and a current-detector-transistor source region formed in a base surface region of the main-transistor base region and the current-detector-transistor base region, respectively, the source regions being of the first conductivity type; a main-transistor gate electrode disposed on an insulation film over the base surface region of the main-transistor base region between the main-transistor source and drain regions, and a current-detector-transistor gate electrode disposed on an insulation film over the base surface region of the current-detector-transistor base region between the current-detector-transistor source and drain regions; a main-transistor source electrode connected to the main-transistor base and source regions, and a current-detector-transistor source electrode connected to the current-detector-transistor base and source regions; wherein the gate electrodes are separated from each other over a portion of the drain surface region under which a diffusion region of the second conductivity type is formed.
Claim 12
Dependent Claim
216 words
A semiconductor device having a main transistor and a current detector transistor disposed on a common semiconductor substrate having a first principal surface side, the semiconductor device comprising: a common drain region of a first conductivity type formed in the first principal surface side of the substrate; a main-transistor base region and a current-detector-transistor base region formed in a drain surface region of the drain region, the base regions being of second conductivity type; a main-transistor source region and a current-detector-transistor source region formed in a base surface region of the main-transistor base region and the current-detector-transistor base region, respectively, the source regions being of the first conductivity type; a main-transistor gate electrode disposed on an insulation film over the base surface region of the main-transistor base region between the main-transistor source and drain regions, and a current-detector-transistor gate electrode disposed on an insulation film over the base surface region of the current-detector-transistor base region between the current-detector-transistor source and drain regions; a main-transistor source electrode connected to the main-transistor base and source regions, and a current-detector-transistor source electrode connected to the current-detector-transistor base and source regions; wherein the gate electrodes are separated from each other over a portion of the drain surface region under which a diffusion region of the second conductivity type is formed.
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2000-04-14 | 2000-10-14 | 2001-04-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-04-14 | 2004-10-14 | 2005-04-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-04-14 | 2008-10-14 | 2009-04-15 | $7700.00 | Window Closed / Lapsed |