Patent US364693A successfully refreshed from Google Patents.
Patent US5607883A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5607883A Expired / Lapsed US ⏱️ 0.0 years remaining

High performance and high capacitance package with improved thermal dissipation

Assignee: Intel Corp
•
Filing: 1996-04-16
•
Granted: 1997-03-04
•
Expires: 2016-04-16
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A thermally dissipative IC package which can accommodate large discrete capacitors. The package substrate incorporates a recessed region on one of its surfaces which is separate from the region in which the IC device is placed. Inside this recessed region is placed a discrete capacitor such that the entire capacitor resides below the surface of the substrate within the recessed region. Finally, a metal plate is attached to the surface of the substrate, unencumbered by the discrete capacitor.

Inventors

  • 👤 Bidyut K. Bhattacharyya
  • 👤 Shigeo Tanahashi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 05:08
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/67; H10W70/68; H10W40/00; H10W40/20; H10W40/22; H10W44/00; H10W44/601; H10W70/682; H10W70/685; H10W72/00; H10W72/071; H10W72/075; H10W72/07551; H10W72/07554; H10W72/50; H10W72/541; H10W72/547; H10W90/00; H10W90/701; H10W90/751; H10W90/754; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49144

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 89 words
A method of housing an integrated circuit, said method comprising: providing a recessed region in a surface of a package substrate; placing a discrete capacitor within said recessed region such that said capacitor is disposed below said surface of said substrate; placing a metal plate over said surface of said substrate such that said metal plate covers said recessed region; and exposing said substrate, said discrete capacitor, and said metal plate to an elevated temperature such that said discrete capacitor and said metal plate are fused to said substrate.
Claim 2
Independent Claim 89 words
A method of housing an integrated circuit, said method comprising: providing a recessed region in a surface of a package substrate; placing a discrete capacitor within said recessed region such that said capacitor is disposed below said surface of said substrate; placing a metal plate over said surface of said substrate such that said metal plate covers said recessed region; and exposing said substrate, said discrete capacitor, and said metal plate to an elevated temperature such that said discrete capacitor and said metal plate are fused to said substrate.
Claim 3
Dependent Claim 17 words
The method of claim 1 wherein said metal plate hermetically seals said capacitor within said recessed region.
Claim 4
Dependent Claim 42 words
The method of claim 1 further comprising the step of electrically coupling a ground plane to both a first terminal end of said capacitor and to said metal plate, and coupling a power plane to a second terminal end of said capacitor.
Claim 5
Dependent Claim 13 words
The method of claim 1 wherein said metal plate primarily comprises pure copper.
Claim 6
Dependent Claim 14 words
The method of claim 1 wherein said package is a ball grid array package.
Claim 7
Independent Claim 94 words
A method of assembling an integrated circuit within a package, said method comprising: providing a package substrate having a through hole and a recessed region in a surface; placing a discrete capacitor within said recessed region such that said capacitor is disposed below said surface of said substrate; attaching a metal plate to said surface of said substrate such that said metal plate hermetically seals said recessed region and one side of said through hole; and attaching said integrated circuit to a portion of said metal plate which is exposed within said through hole.
Claim 8
Independent Claim 94 words
A method of assembling an integrated circuit within a package, said method comprising: providing a package substrate having a through hole and a recessed region in a surface; placing a discrete capacitor within said recessed region such that said capacitor is disposed below said surface of said substrate; attaching a metal plate to said surface of said substrate such that said metal plate hermetically seals said recessed region and one side of said through hole; and attaching said integrated circuit to a portion of said metal plate which is exposed within said through hole.
Claim 9
Dependent Claim 22 words
The method of claim 6 further comprising the step of wire bonding said integrated circuit to conductive pads on said package substrate.
Claim 10
Dependent Claim 30 words
The assembly method of claim 6 wherein said metal plate comprises copper and said capacitor is electrically coupled between a ground supply and a power supply of said integrated circuit.
Claim 11
Independent Claim 117 words
A method of manufacturing a package for an integrated circuit, said method comprising: punching holes in a series of ceramic layers while still in green tape form to create a package substrate having a through hole and a recessed region in a surface; attaching a discrete capacitor using a first conductive paste to electrical vias coupled to power and ground planes within said package substrate, said capacitor disposed within said recessed region; and attaching a metal plate using a second conductive paste to a seal ring formed on said surface of said package substrate, said seal ring being coupled to a ground plane within said package substrate and encompassing both said through hold and said recessed region.
Claim 12
Independent Claim 117 words
A method of manufacturing a package for an integrated circuit, said method comprising: punching holes in a series of ceramic layers while still in green tape form to create a package substrate having a through hole and a recessed region in a surface; attaching a discrete capacitor using a first conductive paste to electrical vias coupled to power and ground planes within said package substrate, said capacitor disposed within said recessed region; and attaching a metal plate using a second conductive paste to a seal ring formed on said surface of said package substrate, said seal ring being coupled to a ground plane within said package substrate and encompassing both said through hold and said recessed region.
Claim 13
Dependent Claim 31 words
The manufacturing method of claim 9 wherein said first and said second conductive pastes have a melting point above a temperature used to subsequently couple said integrated circuit to said plate.

References Cited (Backward Citations)

US4466181A Cited
US4654694A Cited
US4635346A Cited
US4598337A Cited
US4937203A Cited
US4731701A Cited
US5227338A Cited
US5309324A Cited
US5384434A Cited
US5353498A Cited
US5306670A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-03-03 2000-09-02 2001-03-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-03-03 2004-09-02 2005-03-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-03-03 2008-09-02 2009-03-04 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag