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US5604137A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for forming a multilayer integrated circuit

Assignee: Semiconductor Energy Laboratory Co Ltd
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Filing: 1995-06-02
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Granted: 1997-02-18
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Expires: 2015-06-02
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Abstract

Abstract A multilayer semiconductor integrated circuit which does not suffer from latchup. The circuit comprises a semiconductor substrate, a first MOS transistor formed on the substrate, an interlayer insulator deposited on the first transistor, and a second MOS transistor formed on the interlayer insulator. The two transistors have different conductivity types. The gate electrode of the second transistor consists mainly of metal or metal silicide, e.g. aluminum. The upper and side surfaces of the gate electrode is coated with a material comprising an oxide of the metal or metal silicide.

Inventors

  • 👤 Shunpei Yamazaki
  • 👤 Yasuhiko Takemura
  • 👤 Akira Mase
  • 👤 Hideki Uochi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 07:16
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/01; H10B; H10B10/00; H10B10/12; H10B10/125; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6715; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/856; H10D86/201

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 111 words
A method for forming a semiconductor device comprising the steps of: forming a first MOS transistor of one conductivity type on a semiconductor substrate; forming an insulating film on said first MOS transistor; selectively forming a semiconductor film on said insulating film; forming an opening in said insulating film; forming a gate electrode on said semiconductor film; oxidizing a material of said gate electrode; introducing an impurity into said semiconductor film to form a doped region therein; and forming an electrode connecting said doped region with one of source and drain of said first MOS transistor, wherein said electrode is in contact with top and side surfaces of said doped region.
Claim 2
Independent Claim 111 words
A method for forming a semiconductor device comprising the steps of: forming a first MOS transistor of one conductivity type on a semiconductor substrate; forming an insulating film on said first MOS transistor; selectively forming a semiconductor film on said insulating film; forming an opening in said insulating film; forming a gate electrode on said semiconductor film; oxidizing a material of said gate electrode; introducing an impurity into said semiconductor film to form a doped region therein; and forming an electrode connecting said doped region with one of source and drain of said first MOS transistor, wherein said electrode is in contact with top and side surfaces of said doped region.
Claim 3
Dependent Claim 26 words
The method of claim 1 wherein said a gate electrode comprises a multi-layer of a silicon film and an aluminum film provided on said silicon film.
Claim 4
Dependent Claim 26 words
The method of claim 1 wherein said a gate electrode comprises a multi-layer of an aluminum film and a tantalum film provided on said aluminum film.
Claim 5
Dependent Claim 33 words
The method of claim 1 wherein said a gate electrode comprises a single layer comprising a material selected from the group consisting of aluminum, tantalum, titanium, aluminum silicide, tantalum silicide and titanium silicide.
Claim 6
Independent Claim 190 words
A method for forming a semiconductor device comprising: a first MOS transistor of one conductivity type provided on a semiconductor substrate; and a second MOS transistor of a conductivity type different from said one conductivity type provided on said first MOS transistor with an insulating film therebetween, said second MOS transistor comprising a gate electrode and an oxide layer covering a surface of said gate electrode, said method comprising the steps of: forming a semiconductor layer on said insulating film; forming a gate insulating film on said semiconductor layer; introducing an impurity into said semiconductor layer to form a doped region therein; removing a portion of said gate insulating film to expose a portion of said doped region of said semiconductor layer with a portion of said semiconductor layer being unexposed under said gate electrode and said oxide layer; forming a hole in the exposed portion; and forming an electrode and a wiring connecting the exposed portion of said doped region with a terminal of said first MOS transistor through said hole, wherein said electrode and said wiring are in contact with top and side surfaces of said doped region.
Claim 7
Independent Claim 190 words
A method for forming a semiconductor device comprising: a first MOS transistor of one conductivity type provided on a semiconductor substrate; and a second MOS transistor of a conductivity type different from said one conductivity type provided on said first MOS transistor with an insulating film therebetween, said second MOS transistor comprising a gate electrode and an oxide layer covering a surface of said gate electrode, said method comprising the steps of: forming a semiconductor layer on said insulating film; forming a gate insulating film on said semiconductor layer; introducing an impurity into said semiconductor layer to form a doped region therein; removing a portion of said gate insulating film to expose a portion of said doped region of said semiconductor layer with a portion of said semiconductor layer being unexposed under said gate electrode and said oxide layer; forming a hole in the exposed portion; and forming an electrode and a wiring connecting the exposed portion of said doped region with a terminal of said first MOS transistor through said hole, wherein said electrode and said wiring are in contact with top and side surfaces of said doped region.
Claim 8
Dependent Claim 31 words
The method of claim 5 wherein a source or a drain of said second MOS transistor is provided in said exposed portion and is connected with said terminal through said hole.
Claim 9
Dependent Claim 20 words
The method of claim 5 wherein said terminal is a source or a drain terminal of said first MOS transistor.
Claim 10
Dependent Claim 32 words
The method of claim 5 wherein said gate electrode comprises a single layer comprising a material selected from the group consisting of aluminum, tantalum, titanium, aluminum silicide, tantalum silicide and titanium silicide.
Claim 11
Dependent Claim 25 words
The method of claim 5 wherein said gate electrode comprises a multi-layer of a silicon film and an aluminum film provided on said silicon film.
Claim 12
Dependent Claim 25 words
The method of claim 5 wherein said gate electrode comprises a multi-layer of an aluminum film and a tantalum film provided on said aluminum film.
Claim 13
Independent Claim 136 words
A method for forming a semiconductor device comprising the steps of: forming a first MOS transistor of one conductivity type on a semiconductor substrate; forming an insulating film on said first MOS transistor; selectively forming a semiconductor film on said insulating film; forming an opening in said insulating film; forming a gate electrode on said semiconductor film; oxidizing a material of said gate electrode to form an oxidized surface of said gate electrode; introducing an impurity into said semiconductor film to form a doped region therein; and forming an electrode connecting said doped region with one of source and drain of said first MOS transistor, wherein said electrode is in contact with top and side surfaces of said doped region, and wherein said electrode crosses said gate electrode over the oxidized surface of said gate electrode.
Claim 14
Independent Claim 136 words
A method for forming a semiconductor device comprising the steps of: forming a first MOS transistor of one conductivity type on a semiconductor substrate; forming an insulating film on said first MOS transistor; selectively forming a semiconductor film on said insulating film; forming an opening in said insulating film; forming a gate electrode on said semiconductor film; oxidizing a material of said gate electrode to form an oxidized surface of said gate electrode; introducing an impurity into said semiconductor film to form a doped region therein; and forming an electrode connecting said doped region with one of source and drain of said first MOS transistor, wherein said electrode is in contact with top and side surfaces of said doped region, and wherein said electrode crosses said gate electrode over the oxidized surface of said gate electrode.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-02-18 2000-08-19 2001-02-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-02-18 2004-08-19 2005-02-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-02-18 2008-08-19 2009-02-18 $7700.00 Window Closed / Lapsed

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