US5128732A
Expired / Lapsed
US
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Stacked semiconductor device
Assignee: National Institute of Advanced Industrial Science and Technology
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Filing: 1988-05-27
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Granted: 1992-07-07
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Expires: 2008-05-27
Abstract
Abstract A stacked semiconductor device has three-dimensional alternate layers of iconductor elements and insulating layers each electrically insulating the adjacent upper and lower layers of semiconductor elements, formed on a single crystal semiconductor substrate. A semiconductor is deposited in openings formed respectively in the insulating layers to form single crystal semiconductor layers each having the same crystal axis as the single crystal semiconductor substrate respectively over the insulating layers, and semiconductor elements are formed respectively in a plurality of layers. The opening formed through the upper insulating layer reaches the lower layer of the semiconductor element immediately below the same upper insulating layer, and is formed at a position spaced apart horizontally from the opening formed through the lower insulating layer immediately below the same upper insulating layer. A semiconductor for forming the upper layer of a semiconductor having the same crystal axis as the lower layer of a semiconductor is deposited in the opening of the upper insulating layer so that satisfactory lateral epitaxial growth will occur over the insulating layer.
Inventors
- 👤 Kazuyuki Sugahara
- 👤 Tadashi Nishimura
- 👤 Shigeru Kusunoki
- 👤 Yasuo Inoue
- 👤 Yasuo Yamaguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 06:41
CPC Classifications
H; H10; H10D; H10D88/00
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
139 words
A stacked semiconductor device comprising a plurality of alternate layers of semiconductor elements and insulating layers, in which the number of said semiconductor element layers is two or more, formed on a semiconductor substrate, characterized in that the upper insulating layer among the adjacent insulating layers is provided with an opening formed therethrough so as to reach the lower layer of semiconductor element immediately below the upper insulating layer, the opening of the upper insulating layer is formed at a position spaced apart horizontally from the position of an opening of the lower insulating layer reaching the semiconductor substrate, and a semiconductor layer for forming an upper layer of semiconductor element having the same crystal axis as the lower layer of the semiconductor element on the upper insulating layer is formed in the opening of the upper insulating layer.
Claim 2
Dependent Claim
139 words
A stacked semiconductor device comprising a plurality of alternate layers of semiconductor elements and insulating layers, in which the number of said semiconductor element layers is two or more, formed on a semiconductor substrate, characterized in that the upper insulating layer among the adjacent insulating layers is provided with an opening formed therethrough so as to reach the lower layer of semiconductor element immediately below the upper insulating layer, the opening of the upper insulating layer is formed at a position spaced apart horizontally from the position of an opening of the lower insulating layer reaching the semiconductor substrate, and a semiconductor layer for forming an upper layer of semiconductor element having the same crystal axis as the lower layer of the semiconductor element on the upper insulating layer is formed in the opening of the upper insulating layer.
Claim 3
Dependent Claim
32 words
A stacked semiconductor device according to claim 1, wherein said semiconductor substrate is formed of silicon having a principal plane of [100] or a principal plane equivalent to the principal plane of[100].
Claim 4
Dependent Claim
18 words
A stacked semiconductor device according to claim 2, wherein said semiconductor substrate is a single crystal semiconductor layer.
Claim 5
Dependent Claim
18 words
A stacked semiconductor device according to claim 1, wherein said semiconductor substrate is a single crystal semiconductor layer.
Claim 6
Dependent Claim
180 words
A stacked semiconductor device comprising: a single crystal semiconductor substrate; a plurality of two or more layers of semiconductor elements stacked on the single crystal semiconductor substrate in a three-dimensional arrangement with insulating layers, each insulating layer being formed between adjacent upper and lower layers of semiconductor elements to electrically insulate the adjacent upper and lower layers of semiconductor elements, and each insulating layer being provided with an opening formed therethrough and filled with a semiconductor layer; and each single crystal semiconductor layer having the same crystal axis as the single crystal semiconductor substrate, formed over each insulating layer, said upper layer of a semiconductor element being formed on the single crystal semiconductor layer formed over the lower insulating layer immediately below the upper layer of a semiconductor element; characterized in that the area of each of said openings is 9 μm 2 or below, and the opening for forming the semiconductor element of the second layer or above is spaced apart horizontally from the opening formed in the adjacent lower layer by a distance of 8 μm or above.
Claim 7
Dependent Claim
180 words
A stacked semiconductor device comprising: a single crystal semiconductor substrate; a plurality of two or more layers of semiconductor elements stacked on the single crystal semiconductor substrate in a three-dimensional arrangement with insulating layers, each insulating layer being formed between adjacent upper and lower layers of semiconductor elements to electrically insulate the adjacent upper and lower layers of semiconductor elements, and each insulating layer being provided with an opening formed therethrough and filled with a semiconductor layer; and each single crystal semiconductor layer having the same crystal axis as the single crystal semiconductor substrate, formed over each insulating layer, said upper layer of a semiconductor element being formed on the single crystal semiconductor layer formed over the lower insulating layer immediately below the upper layer of a semiconductor element; characterized in that the area of each of said openings is 9 μm 2 or below, and the opening for forming the semiconductor element of the second layer or above is spaced apart horizontally from the opening formed in the adjacent lower layer by a distance of 8 μm or above.
Claim 8
Dependent Claim
33 words
A stacked semiconductor device according to claim 5, wherein said semiconductor substrate is formed of silicon having a principal plane of [100] or a principal plane equivalent to the principal plane of [100].
Claim 9
Dependent Claim
186 words
A stacked semiconductor device formed by the process comprising the steps of: fabricating a first active circuit element on a single crystal semiconductor substrate; forming an insulating layer over said active circuit element; forming an opening in said insulating layer through to said substrate; forming semiconductor material in said opening contacting said substrate; forming a first layer of semiconductor material over said insulating layer and said opening; recrystallizing said first layer of semiconductor material with a crystal orientation corresponding to that of said substrate; dividing said recrystallized layer into an active circuit element portion and a seed portion, said seed portion being spaced apart from said opening in a horizontal direction; forming a second insulating layer over said active circuit element portion and said seed portion; forming a second opening in said second insulating layer through to said seed portion; forming semiconductor material in said second opening contacting said seed portion; forming a second layer of semiconductor material over said second insulating layer and said second opening; and recrystallizing said second layer of semiconductor material with a crystal orientation corresponding to that of said seed portion.
Claim 10
Dependent Claim
186 words
A stacked semiconductor device formed by the process comprising the steps of: fabricating a first active circuit element on a single crystal semiconductor substrate; forming an insulating layer over said active circuit element; forming an opening in said insulating layer through to said substrate; forming semiconductor material in said opening contacting said substrate; forming a first layer of semiconductor material over said insulating layer and said opening; recrystallizing said first layer of semiconductor material with a crystal orientation corresponding to that of said substrate; dividing said recrystallized layer into an active circuit element portion and a seed portion, said seed portion being spaced apart from said opening in a horizontal direction; forming a second insulating layer over said active circuit element portion and said seed portion; forming a second opening in said second insulating layer through to said seed portion; forming semiconductor material in said second opening contacting said seed portion; forming a second layer of semiconductor material over said second insulating layer and said second opening; and recrystallizing said second layer of semiconductor material with a crystal orientation corresponding to that of said seed portion.
References Cited (Backward Citations)
US4472729A
Cited
US4489478A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-07-07 | 1996-01-06 | 1996-07-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-07-07 | 2000-01-06 | 2000-07-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-07-07 | 2004-01-06 | 2004-07-07 | $7700.00 | Window Closed / Lapsed |