US5595938A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing semiconductor device
Assignee: Mitsubishi Electric Corp
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Filing: 1994-11-22
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Granted: 1997-01-21
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Expires: 2014-11-22
Abstract
Abstract A method of manufacturing a semiconductor device includes the steps of forming an interconnection layer consisting of a metal material on a substrate, and forming an anti-reflection film including a compound having metal-silicon-oxygen on this interconnection layer using the same metal material as the material used for this interconnection layer. Thus, it is made possible to form interconnection layer and anti-reflection film by the same apparatus and it is also made possible to treat interconnection layer and anti-reflection film with the same etchant. As a result, efficiency in the method of manufacturing the semiconductor device including an anti-reflection film can be improved.
Inventors
- 👤 Junji Miyazaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 14:19
CPC Classifications
H; H10; H10P; H10P76/00; H10P76/20; H10P76/204; H10P76/2041; H10P76/2043; G; G03; G03F; G03F7/00; G03F7/004; G03F7/09; G03F7/091; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/948; Y10S438/952
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
95 words
A method of manufacturing a semiconductor device, comprising the steps of: forming an interconnection layer consisting of a metal material on a substrate; thereafter forming an insulating layer on said interconnection layer; and forming an anti-reflection film on said insulating layer, said anti-reflection film including a compound having metal-silicon-oxygen, using the same metal material as the material used for said interconnection layer; forming a resist film having a pattern of a shape on said anti-reflection film by photolithography; and patterning said interconnection layer and said anti-reflection film according to the pattern of said resist film.
Claim 2
Independent Claim
95 words
A method of manufacturing a semiconductor device, comprising the steps of: forming an interconnection layer consisting of a metal material on a substrate; thereafter forming an insulating layer on said interconnection layer; and forming an anti-reflection film on said insulating layer, said anti-reflection film including a compound having metal-silicon-oxygen, using the same metal material as the material used for said interconnection layer; forming a resist film having a pattern of a shape on said anti-reflection film by photolithography; and patterning said interconnection layer and said anti-reflection film according to the pattern of said resist film.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-01-21 | 2000-07-22 | 2001-01-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-01-21 | 2004-07-22 | 2005-01-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-01-21 | 2008-07-22 | 2009-01-21 | $7700.00 | Window Closed / Lapsed |