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US5594626A Expired / Lapsed US ⏱️ 0.0 years remaining

Partially-molded, PCB chip carrier package for certain non-square die shapes

Assignee: LSI Corp
•
Filing: 1995-05-02
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Granted: 1997-01-14
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Expires: 2015-05-02
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Abstract

Abstract A dambar-less leadframe is sandwiched between two printed circuit boards (PCBs). The PCBs form a major portion of the package body, and isolate the leadframe leads from plastic molding compound. In one embodiment, an upper PCB (substrate) is formed as a ring, having an opening containing a heat sink element. A lower PCB is also formed as a ring, and has a smaller opening for receiving a die. The back face of the die is mounted to the heat sink. The exposed front face of the die is wire bonded to inner ends of conductive traces on the exposed face of the lower PCB. The outer ends of the traces are electrically connected to the leadframe leads by plated-through vias extending through the two PCBs. The plated-through vias additionally secure the sandwich structure together. Plastic molding compound is injection/transfer molded over the front face of the die and the bond wires, forming a partially-molded package. In another embodiment, the upper PCB is a solid planar element. The back face of the die is mounted to the inside surface of the upper PCB. The die, die-receiving area, and/or package body shape have a "certain non-square" shape (i.e., triangle, trapezoid, parallelogram, greatly-elongated rectangle, etc.).

Inventors

  • 👤 Michael D. Rostoker
  • 👤 Chok J. Chia
  • 👤 Seng-Sooi Lim

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 10:55
CPC Classifications
G; G03; G03F; G03F7/00; G03F7/70; G03F7/70425; G03F7/70433; H; H10; H10D; H10D62/00; H10D62/10; H10D62/117; H10W; H10W70/00; H10W70/40; H10W70/411; H10W70/421; H10W70/435; H10W70/464; H10W70/479; H10W72/00; H10W72/90; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H10W74/124; H10W70/60; H10W70/67; H10W70/68; H10W70/681; H10W72/071; H10W72/075; H10W72/07551; H10W72/07554; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/541; H10W72/5445; H10W72/547; H10W72/59; H10W72/931; H10W72/932; H10W72/951; H10W74/127; H10W90/00; H10W90/701; H10W90/751; H10W90/754; H10W90/756

Claims Analysis

Total Claims: 32
Claim 1
Independent Claim 213 words
Chip carrier package, comprising: an upper substrate having an upper surface, a lower surface, and an outline shape; a lower substrate having an upper surface, a lower surface, and an outline shape; an opening extending through the lower substrate; conductive lines interposed between the lower surface of the upper substrate and the upper surface of the lower substrate, the conductive lines contacting the lower surface of the upper substrate and the upper surface of the lower substrate, and extending between the upper and lower substrates towards the opening in the lower substrate; a semiconductor die having a front face containing circuit elements and a back face, and mounted in the opening in the lower substrate; wiring traces disposed on the lower surface of the lower substrate, and extending across the lower substrate to adjacent the opening in the lower substrate; means for electrically connecting the circuit elements to the inner ends of the wiring traces; means for electrically connecting outer portions of the wiring traces to the conductive lines; plastic molding compound disposed over the front face of the die and extending partially over the lower surface of the lower substrate; ball bumps disposed on the upper surface of the upper substrate; and means for connecting the conductive lines to the ball bumps.
Claim 2
Dependent Claim 213 words
Chip carrier package, comprising: an upper substrate having an upper surface, a lower surface, and an outline shape; a lower substrate having an upper surface, a lower surface, and an outline shape; an opening extending through the lower substrate; conductive lines interposed between the lower surface of the upper substrate and the upper surface of the lower substrate, the conductive lines contacting the lower surface of the upper substrate and the upper surface of the lower substrate, and extending between the upper and lower substrates towards the opening in the lower substrate; a semiconductor die having a front face containing circuit elements and a back face, and mounted in the opening in the lower substrate; wiring traces disposed on the lower surface of the lower substrate, and extending across the lower substrate to adjacent the opening in the lower substrate; means for electrically connecting the circuit elements to the inner ends of the wiring traces; means for electrically connecting outer portions of the wiring traces to the conductive lines; plastic molding compound disposed over the front face of the die and extending partially over the lower surface of the lower substrate; ball bumps disposed on the upper surface of the upper substrate; and means for connecting the conductive lines to the ball bumps.
Claim 3
Dependent Claim 26 words
Chip carrier package, according to claim l, wherein: the means for electrically connecting the circuit elements to inner ends of the wiring traces is bond wires.
Claim 4
Dependent Claim 34 words
Chip carrier package, according to claim 1, wherein: the means for electrically connecting the wiring traces to the conductive lines is at least one row of plated through holes extending through the lower substrate.
Claim 5
Dependent Claim 38 words
Chip carrier package, according to claim 3, wherein: at least two rows of plated through holes are disposed through the lower substrate, and each row of through holes is offset from the remaining rows of plated through holes.
Claim 6
Dependent Claim 38 words
Chip carrier package, according to claim 3, further comprising: additional through holes extending through the upper and lower substrates; wherein: the additional through holes are plated; and the additional through holes are electrically isolated from the conductive lines.
Claim 7
Dependent Claim 43 words
Chip carrier package, according to claim 1, wherein: the upper substrate is provided with a central opening; a heatsink element is disposed within the central opening in the upper substrate; and the back face of the semiconductor die is adhered to the heatsink.
Claim 8
Dependent Claim 25 words
Chip carrier package, according to claim 1, wherein: the back face of the semiconductor die is adhered to the lower surface of the upper substrate.
Claim 9
Dependent Claim 40 words
Chip carrier package, according to claim 1, wherein: a die-receiving area formed by inner ends of the wiring traces has a certain non-square geometric configuration similar to a geometric configuration of a certain non-square die mounted in the die-receiving area.
Claim 10
Dependent Claim 26 words
Chip carrier package, according to claim 1, wherein: a geometric configuration formed by the inner ends of the wiring traces defines a triangular shaped die-receiving area.
Claim 11
Dependent Claim 28 words
Chip carrier package, according to claim 1, wherein: a geometric configuration formed by the inner ends of the wiring traces defines a "greatly elongated rectangular" shaped die-receiving area.
Claim 12
Dependent Claim 26 words
Chip carrier package, according to claim 1, wherein: a geometric configuration formed by the inner ends of the wiring traces defines a parallelogram shaped die-receiving area.
Claim 13
Dependent Claim 26 words
Chip carrier package, according to claim 1, wherein: a geometric configuration formed by the inner ends of the wiring traces define a trapezoidal shaped die-receiving area.
Claim 14
Dependent Claim 24 words
Chip carrier package, according to claim 1, further comprising: a "certain non-square" body shape defined by the outlines of the upper and lower substrates.
Claim 15
Dependent Claim 13 words
Chip carrier package, according to claim 13, wherein: the body shape is triangular.
Claim 16
Dependent Claim 17 words
Chip carrier package, according to claim 13, wherein: the body shape is a "greatly elongated rectangular" shape.
Claim 17
Dependent Claim 15 words
Chip carrier package, according to claim 13, wherein: the body shape is a parallelogram shape.
Claim 18
Dependent Claim 15 words
Chip carrier package, according to claim 13, wherein: the body shape is a trapezoidal shape.
Claim 19
Dependent Claim 210 words
Chip carrier comprising: an upper substrate having an upper surface, a lower surface, and an outline; a lower substrate having an upper surface, a lower surface, and an outline; an opening extending through the lower substrate for receiving a semiconductor die; conductive lines interposed between the lower surface of the upper substrate and the upper surface of the lower substrate, the conductive lines contacting the lower surface of the upper substrate and the upper surface of the lower substrate, and extending between the upper and lower substrates towards the opening in the lower substrate; wiring traces disposed on the lower surface of the lower substrate, and extending across the lower substrate to adjacent the opening in the lower substrate, said wiring traces having inner ends adjacent the opening in the lower substrate; means for electrically connecting outer portions of the wiring traces to the conductive lines; ball bumps disposed on the upper surface of the upper substrate; and means for connecting the conductive lines to the ball bumps; wherein: a completed package is formed by mounting a die in the opening, connecting the die to the inner ends of the wiring traces and disposing plastic molding compound over the die and partially over the lower surface of the lower substrate.
Claim 20
Dependent Claim 210 words
Chip carrier comprising: an upper substrate having an upper surface, a lower surface, and an outline; a lower substrate having an upper surface, a lower surface, and an outline; an opening extending through the lower substrate for receiving a semiconductor die; conductive lines interposed between the lower surface of the upper substrate and the upper surface of the lower substrate, the conductive lines contacting the lower surface of the upper substrate and the upper surface of the lower substrate, and extending between the upper and lower substrates towards the opening in the lower substrate; wiring traces disposed on the lower surface of the lower substrate, and extending across the lower substrate to adjacent the opening in the lower substrate, said wiring traces having inner ends adjacent the opening in the lower substrate; means for electrically connecting outer portions of the wiring traces to the conductive lines; ball bumps disposed on the upper surface of the upper substrate; and means for connecting the conductive lines to the ball bumps; wherein: a completed package is formed by mounting a die in the opening, connecting the die to the inner ends of the wiring traces and disposing plastic molding compound over the die and partially over the lower surface of the lower substrate.
Claim 21
Dependent Claim 33 words
Chip carrier, according to claim 18, wherein: the means for electrically connecting the wiring traces to the conductive lines is at least one row of plated through holes extending through the lower substrate.
Claim 22
Dependent Claim 37 words
Chip carrier, according to claim 19, wherein: at least two rows of plated through holes are disposed through the lower substrate, and each row of through holes is offset from the remaining rows of plated through holes.
Claim 23
Dependent Claim 37 words
Chip carrier, according to claim 19, further comprising: additional through holes extending through the upper and lower substrates; wherein: the additional through holes are plated; and the additional through holes are electrically isolated from the conductive lines.
Claim 24
Dependent Claim 25 words
Chip carrier, according to claim 18, wherein: a geometric configuration formed by the inner ends of the wiring traces defines a triangular shaped die-receiving area.
Claim 25
Dependent Claim 27 words
Chip carrier, according to claim 18, wherein: a geometric configuration formed by the inner ends of the wiring traces defines a "greatly elongated rectangular" shaped die-receiving area.
Claim 26
Dependent Claim 25 words
Chip carrier, according to claim 18, wherein: a geometric configuration formed by the inner ends of the wiring traces defines a parallelogram shaped die-receiving area.
Claim 27
Dependent Claim 25 words
Chip carrier, according to claim 18, wherein: a geometric configuration formed by the inner ends of the wiring traces define a trapezoidal shaped die-receiving area.
Claim 28
Dependent Claim 23 words
Chip carrier, according to claim 18, further comprising: a "certain non-square" body shape defined by the peripheries of the upper and lower substrates.
Claim 29
Dependent Claim 12 words
Chip carrier, according to claim 26, wherein: the body shape is triangular.
Claim 30
Dependent Claim 16 words
Chip carrier, according to claim 26, wherein: the body shape is a "greatly elongated rectangular" shape.
Claim 31
Dependent Claim 14 words
Chip carrier, according to claim 26, wherein: the body shape is a parallelogram shape.
Claim 32
Dependent Claim 14 words
Chip carrier, according to claim 26, wherein: the body shape is a trapezoidal shape.

References Cited (Backward Citations)

US3871014A Cited
US4763188A Cited
US4949225A Cited
US5012386A Cited
US5172303A Cited
US5195023A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-01-14 2000-07-15 2001-01-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-01-14 2004-07-15 2005-01-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-01-14 2008-07-15 2009-01-14 $7700.00 Window Closed / Lapsed

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