Packaging system for multiple semiconductor devices

Claim 2

A high density integrated circuit packaging system comprising: a first substrate assembly including a first generally wafer-shaped substrate having inside and outside surfaces, a first metalization layer forming a first electrical interconnection network on said outside surface, at least one integrated circuit device mounted on said outside surface and including a plurality of electrical contacts for establishing electrical connection therewith, and first electrical interconnection means for connecting said contacts with said first electrical interconnection network; a second substrate assembly including a second generally wafer-shaped substrate having inside and outside surfaces, a second metalization layer forming a second electrical interconnection network for devices and said outside surface, and at least one integrated circuit device mounted on said outside surface and including a plurality of electrical contacts for establishing electrical communication therewith, and second electrical interconnection means for connecting said contacts with said second electrical interconnection network; said substrates having like dimensions and being disposed in a parallel-spaced arrangement; a lead frame including a plurality of leads each having a proximate end and a distal end, said proximate ends of said leads being arranged in generally opposed pairs in a generally planar configuration and each including an interior portion disposed between and engaged by said inside surfaces of said substrates whereby said leads are fixedly positioned relative to said substrates, and an exterior poriton disposed outside of said substrate arrangement for establishing electrical, connections to said lead; bonding means for securing said substrates on either side of said interior portions of said proximate lead ends; and connection means for electrically interconnecting said exterior portions of said proximate lead ends with said first and second electrical interconnection networks whereby said integrated circuit devices are electrically interconnected and electrically accessible through said leads.

Claim 3

A high density integrated circuit packaging system as defined in claim 1 wherein said substrate assemblies are identical.

Claim 4

A high density integrated circuit packaging system as defined in claim 1 wherein each of said substrate assemblies comprises a multilayer circuit board.

Claim 5

A high density integrated circuit packaging system as defined in claim 1 wherein each of said substrates comprises a thin film ceramic substrate.

Claim 6

A high density integrated circuit packaging system as defined in claim 1 wherein said bonding means comprise a layer of epoxy material.

Claim 7

A high density integrated circuit packaging system as defined in claim 1 wherein said connection means comprise a plurality of wire segments.

Claim 8

A high density integrated circuit packaging system as defined in claim 1 including an encapsulation layer overlying said first and second substrates and said lead frame.

Claim 9

A high density integrated circuit packaging system as defined in claim 7 wherein said encapsulation layer comprises an epoxy or plastic material.

Claim 10

A high density semiconductor packaging system as defined in claim 1 wherein said first substrate assembly includes at least a first pair of said integrated circuit devices mounted on said outside surface, and said first electrical interconnection means interconnect the electrical contacts thereof through said first electrical interconnection network.

Claim 11

A high density integrated circuit packaging system as defined in claim 9 wherein said second substrate assembly includes at least a pair of said integrated circuit devices mounted on said outside surface, and said second electrical interconnection means interconnect the electrical contacts thereof through said second electrical interconnection network.

Claim 12

A high density integrated circuit packaging system as defined in claim 10 wherein said substrate assemblies are identical.

Claim 13

A high density integrated circuit packaging system as defined in claim 6 wherein said interconnection means comprise an additional plurality of wire segments.

Claim 14

A high density integrated circuit packaging system comprising: a first generally wafer-like substrate having an inside surface and an outside surface; a first metalization layer forming a first electrical interconnection network for devices on said outside surface of said first substrate; first and second discrete integrated circuit devices mounted on said outside surface of said first substrate, each of said devices including a plurality of electrical contacts for establishing electrical communication therewith; first electrical interconnection means for connecting said electrical contacts of said first and second devices with said first interconnection network to establish electrical communication between said first and second devices and said network; a second generally wafer-like substrate having an inside surface and an outside surface; a second metalization layer forming a second electrical interconnection network on said outside surface of said second substrate; third and fourth discrete integrated circuit devices mounted on said outside surface of said second substrate, each of said devices including a plurality of electrical contacts for establishing electrical communication therewith; second electrical interconnection means for connecting said electrical contacts of said third and fourth devices with said second interconnection network to establish electrical communication between said third and fourth devices and said network; said substrates having like dimensions and being disposed in a parallel-spaced arrangement; a lead frame including a plurality of leads each having a proximate end and a distal end, said proximate ends of said leads being arranged in generally opposed pairs in a generally planar configuration and each including an interior portion disposed between and engaged by said inside surfaces of said substrates whereby said leads are fixedly positioned relative to said substrates, and an exterior portion disposed outside of said substrate arrangement for establishing electrical, connections to said lead; bonding means for securing said substrates on either side of said interior poritons of said proximate lead ends; and connection means for electrically interconnecting said exterior portions of said proximate lead ends with said first and second electrical interconnection networks whereby said first, second, third and fourth integrated circuit devices are electrically interconnected and electrically accessible through said leads.

Claim 15

A high density integrated circuit packaging system comprising: a first generally wafer-like substrate having an inside surface and an outside surface; a first metalization layer forming a first electrical interconnection network for devices on said outside surface of said first substrate; first and second discrete integrated circuit devices mounted on said outside surface of said first substrate, each of said devices including a plurality of electrical contacts for establishing electrical communication therewith; first electrical interconnection means for connecting said electrical contacts of said first and second devices with said first interconnection network to establish electrical communication between said first and second devices and said network; a second generally wafer-like substrate having an inside surface and an outside surface; a second metalization layer forming a second electrical interconnection network on said outside surface of said second substrate; third and fourth discrete integrated circuit devices mounted on said outside surface of said second substrate, each of said devices including a plurality of electrical contacts for establishing electrical communication therewith; second electrical interconnection means for connecting said electrical contacts of said third and fourth devices with said second interconnection network to establish electrical communication between said third and fourth devices and said network; said substrates having like dimensions and being disposed in a parallel-spaced arrangement; a lead frame including a plurality of leads each having a proximate end and a distal end, said proximate ends of said leads being arranged in generally opposed pairs in a generally planar configuration and each including an interior portion disposed between and engaged by said inside surfaces of said substrates whereby said leads are fixedly positioned relative to said substrates, and an exterior portion disposed outside of said substrate arrangement for establishing electrical, connections to said lead; bonding means for securing said substrates on either side of said interior poritons of said proximate lead ends; and connection means for electrically interconnecting said exterior portions of said proximate lead ends with said first and second electrical interconnection networks whereby said first, second, third and fourth integrated circuit devices are electrically interconnected and electrically accessible through said leads.

Claim 16

A high density integrated circuit packaging system as defined in claim 13 wherein said connection means comprise a plurality of wire segments.

Claim 17

A high density integrated circuit packaging system as defined in claim 14 wherein said interconnection means comprise an additional plurality of wire segments.