Patent US5591671A successfully refreshed from Google Patents.
US5591671A
Expired / Lapsed
US
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Method for interconnecting layers in semiconductor device
Assignee: Samsung Electronics Co Ltd
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Filing: 1995-01-18
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Granted: 1997-01-07
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Expires: 2015-01-18
Abstract
Abstract A method for interconnecting layers in a semiconductor device, which can form a low resistance contact, is provided. An insulating layer is formed on a semiconductor substrate and an opening is formed in the insulating layer. The opening is a contact hole for exposing an impurity diffusion region formed on the semiconductor substrate, or a via hole for exposing a lower conductive layer formed on the semiconductor substrate. Subsequently, a titanium ohmic contacting layer and a titanium nitride barrier layer are formed in the interior of the opening hole and on the insulating layer in sequence. Thereafter, a refractory metal layer which completely fills the remainder of the opening hole by depositing the refractory metal on the barrier layer is formed. To improve a contacting property, the resultant is heat-treated at a temperature above 450° C. As a result, oxidation of the ohmic contacting layer and the barrier layer is prevented, and silicide is actively formed on the interface between the ohmic contacting layer and the silicon substrate, whereby the contacting resistance can be improved. The effect is enhanced for contact holes having a high aspect ratio and a small diameter.
Inventors
- 👤 Young-sun Kim
- 👤 Young-wook Park
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 09:01
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/033; H10W20/035; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10W20/047; H10W20/056
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
162 words
A method for interconnecting layers in a semiconductor device comprising the steps of: forming a conductive layer on a semiconductor layer; forming an insulating layer on said conductive layer; forming an opening through said insulating layer, thereby exposing a portion of said conductive layer, said opening having an interior; forming an ohmic contacting layer in the interior of said opening on said portion of said conductive layer and on said insulating layer leaving a first remainder of said opening partly unfilled; forming a barrier layer on said ohmic contacting layer, thereby partly filling said first remainder of said opening, and thereby creating a resultant structure; forming a refractory metal layer by completely filling said first remainder of said opening by depositing the refractory metal on said resultant structure; and heat-treating said resultant structure at a temperature of 500° C. to 550° C. after forming said refractory metal layer so that oxidation of said ohmic contacting layer and said barrier layer is prevented.
Claim 2
Independent Claim
162 words
A method for interconnecting layers in a semiconductor device comprising the steps of: forming a conductive layer on a semiconductor layer; forming an insulating layer on said conductive layer; forming an opening through said insulating layer, thereby exposing a portion of said conductive layer, said opening having an interior; forming an ohmic contacting layer in the interior of said opening on said portion of said conductive layer and on said insulating layer leaving a first remainder of said opening partly unfilled; forming a barrier layer on said ohmic contacting layer, thereby partly filling said first remainder of said opening, and thereby creating a resultant structure; forming a refractory metal layer by completely filling said first remainder of said opening by depositing the refractory metal on said resultant structure; and heat-treating said resultant structure at a temperature of 500° C. to 550° C. after forming said refractory metal layer so that oxidation of said ohmic contacting layer and said barrier layer is prevented.
Claim 3
Dependent Claim
36 words
A method for interconnecting layers in a semiconductor device as claimed in claim 1, wherein: said semiconductor layer is a semiconductor substrate; and said conductive layer is an impurity diffusion region formed in said semiconductor substrate.
Claim 4
Dependent Claim
36 words
A method for interconnecting layers in a semiconductor device as claimed in claim 1, wherein said ohmic contacting layer is constituted by a material selected from the group consisting of Ti, Ta, W, Mo and Pt.
Claim 5
Dependent Claim
22 words
A method for interconnecting layers in a semiconductor device as claimed in claim 1, wherein said barrier layer is constituted by TiN.
Claim 6
Dependent Claim
36 words
A method for interconnecting layers in a semiconductor device as claimed in claim 1, wherein said refractory metal layer is constituted by a material selected from the group consisting of W, Cu, Mo, Au and Pt.
Claim 7
Dependent Claim
57 words
A method for interconnecting layers in a semiconductor device as claimed in claim 1, further comprising a step of forming a metal line by patterning the refractory metal layer together with said barrier layer and ohmic contacting layer formed on said insulating layer, between the formation step of the refractory metal layer and the heat treatment step.
Claim 8
Dependent Claim
53 words
A method for interconnecting layers in a semiconductor device as claimed in claim 7, further comprising a step of forming an oxidation-preventing layer over the resultant structure, between the formation step of the metal line and the heat treatment step, to prevent oxidation of the refractory metal layer during the heat treatment step.
Claim 9
Dependent Claim
66 words
A method for interconnecting layers in a semiconductor device as claimed in claim 1, further comprising a step of etching-back said refractory metal layer together with said barrier layer and ohmic contacting layer until said insulating layer is exposed, between said formation step of the refractory metal layer and the heat treatment step, thereby leaving said refractory metal layer only in the interior of said opening.
Claim 10
Dependent Claim
56 words
A method for interconnecting layers in a semiconductor device as claimed in claim 8, further comprising a step of forming an oxidation preventing cap layer on the resultant structure between said step of etching-back the metal layer and said heat treatment step, for preventing the oxidation of said refractory metal layer during the heat treatment step.
Claim 11
Dependent Claim
23 words
A method for interconnecting layers in a semiconductor device as claimed in claim 9, wherein said oxidation-preventing cap layer is formed of TiN.
Claim 12
Dependent Claim
56 words
A method for interconnecting layers in a semiconductor device as claimed in claim 1, further comprising a step of forming an oxidation-preventing cap layer on said refractory metal layer, between said formation step of the refractory metal layer and the heat treatment step, to prevent oxidation of said refractory metal layer during the heat treatment step.
Claim 13
Dependent Claim
23 words
A method for interconnecting layers in a semiconductor device as claimed in claim 11, wherein said oxidation-preventing cap layer is formed of TIN.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-01-07 | 2000-07-08 | 2001-01-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-01-07 | 2004-07-08 | 2005-01-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-01-07 | 2008-07-08 | 2009-01-07 | $7700.00 | Window Closed / Lapsed |