Comparator with built-in hysteresis

Claim 2

A comparator circuit comprising: a differential input stage having a V + input for receiving a first voltage, a V - input for receiving a second voltage, having a first bias voltage input, having a second bias voltage input, and having an output; an output stage having an input for receiving the output of the differential input stage and having an output, the output stage comprising at least one inverter; and a bias circuit having a bias voltage connected to the first bias voltage input of the differential input stage and having a hysteresis circuit wherein the hysteresis circuit comprises: a means for selectively applying the bias voltage to the second bias voltage input of the differential amplifier, wherein the means for selectively applying the bias voltage comprises: a first transistor having a current path between the bias voltage and the second bias voltage input of the differential input stage and having a control element connected to the input of the at least one inverter of the output stage, and a second transistor having a current path connected between the second bias voltage input and ground, and having a control element connected to the output of the at least one inverter of the output stage.

Claim 3

The comparator circuit of claim 1 wherein the first and second transistors are MOSFET transistors.

Claim 4

The comparator circuit of claim 2 wherein the first and second transistors are n-channel MOSFET transistors.

Claim 5

A comparator comprising: a differential input stage comprising: a current mirror having a primary current path and having a mirrored current path; a first input transistor having a control element for receiving a first input voltage, and having a first current path with a first end connected to the primary current path of the current mirror, and having a second end; a second input transistor having a control element for receiving a second input voltage, and having a second current path with a first end connected to the mirrored current path of the current mirror, and having a second end; a resistor connected across the second ends of the current paths of the first and second input transistor; a first current bias transistor having a current path with a first end connected to the second end of the current path of the first input transistor, having a second end connected to ground, and having a control element; a second current bias transistor having a current path with a first end connected to the second end of the current path of the second input transistor, having a second end connected to ground, and having a control element; an output stage having an input connected to the first end of the current path of the second input transistor, and having an output, wherein said output stage comprises at least one inverter; and a bias circuit having a bias voltage output which is connected to the control element of the second current bias transistor, the bias current circuit further comprising a hysteresis circuit, for selectively connecting the bias voltage output to the control element of the first current bias transistor.

Claim 6

A comparator comprising: a differential input stage comprising: a current mirror having a primary current path and having a mirrored current path; a first input transistor having a control element for receiving a first input voltage, and having a first current path with a first end connected to the primary current path of the current mirror, and having a second end; a second input transistor having a control element for receiving a second input voltage, and having a second current path with a first end connected to the mirrored current path of the current mirror, and having a second end; a resistor connected across the second ends of the current paths of the first and second input transistor; a first current bias transistor having a current path with a first end connected to the second end of the current path of the first input transistor, having a second end connected to ground, and having a control element; a second current bias transistor having a current path with a first end connected to the second end of the current path of the second input transistor, having a second end connected to ground, and having a control element; an output stage having an input connected to the first end of the current path of the second input transistor, and having an output, wherein said output stage comprises at least one inverter; and a bias circuit having a bias voltage output which is connected to the control element of the second current bias transistor, the bias current circuit further comprising a hysteresis circuit, for selectively connecting the bias voltage output to the control element of the first current bias transistor.

Claim 7

The comparator of claim 4 wherein the hysteresis circuit of the bias circuit further comprises a transistor with a current path connected between the bias voltage output and the control element of the first current bias transistor, and has a control element connected the output stage.

Claim 8

The comparator of claim 5 wherein the hysteresis circuit further comprises a second transistor having a current path between the control element of the first current bias transistor and ground, and has a control element connected to the output stage.