US5334883A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for introducing hysterisis
Assignee: Elantec Semiconductor LLC
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Filing: 1993-02-03
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Granted: 1994-08-02
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Expires: 2013-02-03
Abstract
Abstract A novel driver circuit and feedback loop is provided that improves the response time of the driver circuit and produces threshold voltages and hysteresis levels which are substantially independent of the supply voltage. The feedback circuit uses a pair of transistors connected in a cascode configuration to provide positive feedback from the output of the driver circuit and to control this feedback by means of the signal at the driver circuit input. By coupling the input voltages to the gate of a cascode transistor, the response time of the driver circuit is improved without disturbing its high input impedance. In addition, by replacing a transistor in the driver circuit input buffer with a current source, the threshold voltage of the driver circuit can be made substantially independent of the supply voltage.
Inventors
- 👤 Bruce D. Rosenthal
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:35
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/353; H03K3/356; H03K3/3565; H03K3/01; H03K3/011
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
354 words
A fast, high performance driver circuit having a threshold voltage and a hysteresis level which are substantially independent of the supply voltage, the driver circuit comprising: a first inverter including first and second transistors having opposite conductivity properties, each having a gate, source and drain, the drains of the first ad second transistors being connected to a common node to form an output of the first inverter, the first transistor having its gate connected to a bias voltage and its source connected to a supply voltage for supplying current to the node at the output of the first inverter according to the bias, and the second transistor having its gate forming an input for the first inverter as an input of the driver circuit, and its source connected to a reference voltage, the first inverter being a class A inverting amplifier for providing a threshold voltage that is substantially independent of the supply voltage; a second inverter having an input and an output, the input of the second inverter being connected to the node at the output of the first inverter and the output of the second inverter forming the output of the driver circuit, for providing a signal at the driver circuit output having a polarity that is opposite to the polarity of the signal at the input of the second inverter; a cascoded transistor pair having a pair of inputs formed by the gates of the cascoded transistors, an output formed by the drain of one of the cascoded transistors and a reference terminal formed by the source of the other cascoded transistor, one of the cascode inputs being connected to the driver circuit output, the other cascode input being connected to the driver circuit input, the cascode output being connected to the node at the output of the first inverter, and the cascode reference terminal being connected to a reference voltage, for controlling the flow of current from the first transistor of the first inverter into the drain of the second transistor and into the cascode transistors in response to voltage signals at the input and output of the driver circuit.
Claim 2
Dependent Claim
354 words
A fast, high performance driver circuit having a threshold voltage and a hysteresis level which are substantially independent of the supply voltage, the driver circuit comprising: a first inverter including first and second transistors having opposite conductivity properties, each having a gate, source and drain, the drains of the first ad second transistors being connected to a common node to form an output of the first inverter, the first transistor having its gate connected to a bias voltage and its source connected to a supply voltage for supplying current to the node at the output of the first inverter according to the bias, and the second transistor having its gate forming an input for the first inverter as an input of the driver circuit, and its source connected to a reference voltage, the first inverter being a class A inverting amplifier for providing a threshold voltage that is substantially independent of the supply voltage; a second inverter having an input and an output, the input of the second inverter being connected to the node at the output of the first inverter and the output of the second inverter forming the output of the driver circuit, for providing a signal at the driver circuit output having a polarity that is opposite to the polarity of the signal at the input of the second inverter; a cascoded transistor pair having a pair of inputs formed by the gates of the cascoded transistors, an output formed by the drain of one of the cascoded transistors and a reference terminal formed by the source of the other cascoded transistor, one of the cascode inputs being connected to the driver circuit output, the other cascode input being connected to the driver circuit input, the cascode output being connected to the node at the output of the first inverter, and the cascode reference terminal being connected to a reference voltage, for controlling the flow of current from the first transistor of the first inverter into the drain of the second transistor and into the cascode transistors in response to voltage signals at the input and output of the driver circuit.
Claim 3
Dependent Claim
45 words
The fast, high performance driver circuit of claim 1 wherein the cascoded transistor having its gate connected to the output of the driver circuit also has a larger W/L ratio than the cascoded transistor having its gate connected to the input of the driver circuit.
Claim 4
Dependent Claim
23 words
The fast, high performance driver circuit of claim 2 wherein the cascoded transistors are N-channel MOSFETs and the reference potential is ground potential.
Claim 5
Dependent Claim
25 words
The fast, high performance driver circuit of claim 2 wherein the cascoded transistors are P-channel MOSFETs and the reference potential is the positive supply voltage.
Claim 6
Dependent Claim
45 words
The fast, high performance driver circuit of claim 1 wherein the cascode input connected to the driver circuit input and the cascode output connected to the node at the output of the first inverter are the gate and drain, respectively, of the same cascoded transistor.
Claim 7
Dependent Claim
45 words
The fast, high performance driver circuit of claim 1 wherein the cascode input connected to the driver circuit output and the cascode output connected to the node at the output of the first inverter are the gate and drain, respectively, of the same cascoded transistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-08-01 | 1998-01-31 | 1998-08-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-08-01 | 2002-01-31 | 2002-08-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-08-01 | 2006-01-31 | 2006-08-02 | $7700.00 | Window Closed / Lapsed |