US5586291A — Disk controller with volatile and non-volatile ca…

Claim 1

Independent Claim 139 words

A disk controller coupled between a host computer and a disk drive, the disk controller comprising: a controller microprocessor; a cache memory including: at least one volatile memory module; and at least one non-volatile memory module; a cache memory control circuit coupled to said at least one non-volatile memory module and said at least one volatile memory module wherein in response to a write command received from the host computer, said controller microprocessor allocates a predetermined number of memory blocks in each of said at least one volatile and said at least one non-volatile memory modules for storage of write-data and upon completion of a write operation to said at least one non-volatile memory modules, said cache memory control circuit transfers the write-data from said at least one non-volatile memory module to said at least one volatile memory module.

Claim 2

Dependent Claim 139 words

A disk controller coupled between a host computer and a disk drive, the disk controller comprising: a controller microprocessor; a cache memory including: at least one volatile memory module; and at least one non-volatile memory module; a cache memory control circuit coupled to said at least one non-volatile memory module and said at least one volatile memory module wherein in response to a write command received from the host computer, said controller microprocessor allocates a predetermined number of memory blocks in each of said at least one volatile and said at least one non-volatile memory modules for storage of write-data and upon completion of a write operation to said at least one non-volatile memory modules, said cache memory control circuit transfers the write-data from said at least one non-volatile memory module to said at least one volatile memory module.

Claim 3

Dependent Claim 147 words

The disk controller of claim 1 wherein: said controller microprocessor includes a memory having stored therein a list of memory blocks available for use in said at least one non-volatile memory module and wherein said controller microprocessor is adapted to allocate from the list a predetermined number of memory blocks of said at least one non-volatile memory module for storage of the host write-data thereby removing the predetermined number of memory blocks of said at least one non-volatile memory module from the list of memory blocks available for use; and said controller is adapted to allocate a corresponding number of memory blocks of said at least one volatile memory module such that said cache memory control circuit can transfer the write-data from the predetermined memory blocks of said at least one non-volatile memory module to the corresponding memory blocks of said at least one volatile memory module.

Claim 4

Dependent Claim 36 words

The disk controller of claim 2 wherein said cache memory control circuit transfers the write data from said at least one non-volatile memory module to said at least one volatile memory module with a DMA transfer.

Claim 5

Dependent Claim 65 words

The disk controller of claim 3 wherein the list of available memory blocks is provided from a plurality of linked domains wherein each of said plurality of linked domains represents a predetermined number of memory blocks and wherein each of said plurality of domains has associated therewith a valid field and an in-operation field which indicate the status of each memory block in said domain.

Claim 6

Dependent Claim 42 words

The disk controller of claim 3 wherein in response to write-data being stored on the disk drive, the allocated memory blocks of said at least one non-volatile memory module are de-allocated and added to the list of memory blocks available for use.

Claim 7

Dependent Claim 26 words

The disk controller of claim 5 further comprising a sequence counter for tracking the number or write operations in particular one of said plurality of domains.

Claim 8

Dependent Claim 20 words

The disk controller of claim 3 wherein said cache memory control circuit is provided as an application specific integrated circuit.

Claim 9

Dependent Claim 122 words

The disk controller of claim 7 wherein: said controller microprocessor includes a memory having stored therein a list of memory blocks available for use in said at least one non-volatile memory module wherein the list of available memory blocks is provided from a plurality of linked domains wherein each of said plurality of linked domains represents a predetermined number of memory blocks and wherein each of said plurality of domains has associated therewith a valid field and an in-operation field which indicate the status of each memory block in said domain; said at least one volatile memory module is provided as a single in-line memory module; and said at least one non-volatile memory module is provided as a single in-line memory module.

Claim 10

Dependent Claim 142 words

A disk storage subsystem comprising: at least one disk drive; and a disk controller coupled to said disk drive and adapted to couple to a host computer, said disk controller comprising: a controller microprocessor; a cache memory including: a plurality of volatile memory modules which form a read-cache; a plurality of non-volatile memory modules which form a write-cache; and a cache memory control circuit coupled to said non-volatile memory module and said volatile memory module wherein in response a write command received from the host computer, said controller microprocessor allocates a predetermined number of memory blocks in each of said volatile and said non-volatile memory modules for storage of write data and upon completion of a write operation to said non-volatile memory modules, said cache memory control circuit transfers the write data from said non-volatile memory module to said volatile memory module.

Claim 11

Dependent Claim 142 words

A disk storage subsystem comprising: at least one disk drive; and a disk controller coupled to said disk drive and adapted to couple to a host computer, said disk controller comprising: a controller microprocessor; a cache memory including: a plurality of volatile memory modules which form a read-cache; a plurality of non-volatile memory modules which form a write-cache; and a cache memory control circuit coupled to said non-volatile memory module and said volatile memory module wherein in response a write command received from the host computer, said controller microprocessor allocates a predetermined number of memory blocks in each of said volatile and said non-volatile memory modules for storage of write data and upon completion of a write operation to said non-volatile memory modules, said cache memory control circuit transfers the write data from said non-volatile memory module to said volatile memory module.

Claim 12

Dependent Claim 49 words

The disk storage subsystem of claim 9 wherein: said plurality of volatile memory modules which form said read-cache are provided from a plurality of physically separate memory modules; and said plurality of non-volatile memory modules which form said write-cache are provided from a plurality of physically separate memory modules.

Claim 13

Dependent Claim 26 words

The disk storage subsystem of claim 10 wherein at least one of said plurality of non-volatile memory modules is provided as a single in-line memory module.

Claim 14

Dependent Claim 89 words

The disk storage subsystem of claim 11 wherein said controller microprocessor includes a memory having stored therein a list of memory blocks available for use in said non-volatile memory module wherein the list of available memory blocks is provided from a plurality of linked domains wherein each of said plurality of linked domains represents a predetermined number of memory blocks and wherein each of said plurality of domains has associated therewith a valid field and an in-operation field which indicate the status of each memory block in said domain.

Claim 15

Dependent Claim 130 words

The disk storage subsystem of claim 11 wherein: said controller microprocessor includes a memory having stored therein a list of memory blocks available for use in said non-volatile memory module and wherein said controller microprocessor is adapted to allocate from the list a predetermined number of memory blocks of said non-volatile memory module for storage of the host write-data thereby removing the predetermined number of memory blocks of said non-volatile memory module from the list of memory blocks available for use; and said controller is adapted to allocate a corresponding number of memory blocks of said volatile memory module such that said cache memory control circuit can transfer the write-data from the predetermined memory blocks of said non-volatile memory module to the corresponding memory blocks of the volatile memory module.

Claim 16

Dependent Claim 40 words

The disk storage subsystem of claim 12 wherein in response to write-data being stored on the disk drive, the allocated memory blocks of said non-volatile memory module are de-allocated and added to the list of memory blocks available for use.

Claim 17

Dependent Claim 40 words

The disk storage subsystem of claim 14 wherein said at least one disk drive is a first one of a plurality of disk drives each of said plurality of disk drives coupled to provide a redundant array of inexpensive disks.

Claim 18

Independent Claim 174 words

A method of transferring data to be written from a host computer to at least one disk drive within a disk storage subsystem including a host interface circuit, a disk interface circuit, a controller microprocessor, a cache memory, a cache memory management circuit and the at least one disk drive, the method comprising the steps of: receiving in the disk storage subsystem a host write-to-disk command; allocating a predetermined number of memory blocks in a non-volatile memory module of the cache memory; allocating a predetermined number of memory blocks in a volatile memory module of the cache memory; storing the data to be written to the at least one disk drive in the allocated memory blocks of the non-volatile memory module of the cache memory; and initiating a DMA transfer by the cache memory management circuit, to copy the data to be written to the at least one disk drive from the allocated memory blocks of the non-volatile memory module to the allocated memory blocks of the volatile memory module of the cache memory.

Claim 19

Independent Claim 174 words

A method of transferring data to be written from a host computer to at least one disk drive within a disk storage subsystem including a host interface circuit, a disk interface circuit, a controller microprocessor, a cache memory, a cache memory management circuit and the at least one disk drive, the method comprising the steps of: receiving in the disk storage subsystem a host write-to-disk command; allocating a predetermined number of memory blocks in a non-volatile memory module of the cache memory; allocating a predetermined number of memory blocks in a volatile memory module of the cache memory; storing the data to be written to the at least one disk drive in the allocated memory blocks of the non-volatile memory module of the cache memory; and initiating a DMA transfer by the cache memory management circuit, to copy the data to be written to the at least one disk drive from the allocated memory blocks of the non-volatile memory module to the allocated memory blocks of the volatile memory module of the cache memory.

Claim 20

Dependent Claim 37 words

The method of claim 16 further comprising the step of transferring the data to be written from the allocated memory blocks of the volatile memory module of the cache memory to the at least one disk drive.

Claim 21

Dependent Claim 55 words

The method of claim 16 wherein the step of transferring the data to be written from the allocated memory blocks of the volatile memory module to the at least one disk drive includes the step of writing data across each of a plurality of disk drives coupled to provide a redundant array of inexpensive disks.

Claim 22

Dependent Claim 21 words

The method of claim 18 further comprising the step of writing parity information across each of the plurality of disk drives.

Claim 23

Dependent Claim 53 words

The method of claim 17 wherein after the step of transferring the data to be written from the allocated memory blocks of the volatile memory module to the at least one disk drive performing the step of de-allocating the predetermined number of memory blocks in the non-volatile memory module of the cache memory.

Claim 24

Independent Claim 126 words

A method of controlling a cache memory of a disk storage subsystem coupled to a host computer, the method comprising the steps of: establishing a list of available memory blocks in a write-cache; in response to a write operation initiated by a host computer, allocating from the list of available memory blocks a predetermined number of memory blocks of the write-cache; allocating a like predetermined number of blocks in a read-cache; receiving write-data from the host computer; storing the write-data in the allocated memory blocks of the write-cache; indicating to the host computer that the write-data stored in the read-cache is valid and available for use; and transferring the write-data from the allocated memory blocks of the write-cache to the allocated memory blocks of the read-cache.

Claim 25

Independent Claim 126 words

A method of controlling a cache memory of a disk storage subsystem coupled to a host computer, the method comprising the steps of: establishing a list of available memory blocks in a write-cache; in response to a write operation initiated by a host computer, allocating from the list of available memory blocks a predetermined number of memory blocks of the write-cache; allocating a like predetermined number of blocks in a read-cache; receiving write-data from the host computer; storing the write-data in the allocated memory blocks of the write-cache; indicating to the host computer that the write-data stored in the read-cache is valid and available for use; and transferring the write-data from the allocated memory blocks of the write-cache to the allocated memory blocks of the read-cache.

Claim 26

Dependent Claim 22 words

The method of claim 21 further comprising the step of storing the write-data on a disk drive of the disk storage subsystem.

Claim 27

Dependent Claim 18 words

The method of claim 22 further comprising the step of de-allocating the allocated memory blocks of the write-cache.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1999-12-17	2000-06-17	2000-12-17	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2003-12-17	2004-06-17	2004-12-17	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2007-12-17	2008-06-17	2008-12-17	$7700.00	Window Closed / Lapsed

Disk controller with volatile and non-volatile cache memories

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